/*
* Execute several steps with trace output
*/
void do_trace(char *s)
{
register int count, i;
while (isspace((int)*s))
s++;
if (*s == '\0')
count = 20;
else
count = atoi(s);
cpu_state = SINGLE_STEP;
cpu_error = NONE;
print_head();
print_reg();
for (i = 0; i < count; i++) {
cpu();
print_reg();
if (cpu_error) {
if (cpu_error == OPHALT) {
if (!handel_break()) {
break;
}
} else
break;
}
}
cpu_err_msg();
}
static int print_reg_regs(struct string *str, struct insn *insn)
{
for (unsigned long ndx = 0; ndx < insn->nr_srcs; ndx++) {
print_reg(str, &insn->ssa_srcs[ndx]);
str_append(str, ", ");
}
return print_reg(str, &insn->ssa_dest);
}
/*
* Run the CPU emulation endless
*/
static void do_go(char *s)
{
while (isspace((int)*s))
s++;
if (isxdigit((int)*s))
PC = exatoi(s);
cont:
cpu_state = CONTIN_RUN;
cpu_error = NONE;
switch(cpu) {
case Z80:
cpu_z80();
break;
case I8080:
cpu_8080();
break;
}
if (cpu_error == OPHALT)
if (handel_break())
if (!cpu_error)
goto cont;
cpu_err_msg();
print_head();
print_reg();
}
static void print_arg( struct fragment_program *p,
GLuint arg )
{
GLuint src = UREG_SRC0(arg);
if (src == _ZERO) {
emit(p, "0");
return;
}
if (arg & (1<<UREG_CHANNEL_X_NEGATE_SHIFT))
emit(p, "-");
if (src == _ONE) {
emit(p, "1");
return;
}
if (GET_UREG_TYPE(arg) == UREG_TYPE_STATE_CONST &&
p->Parameters->Parameters[GET_UREG_NR(arg)].Type == CONSTANT) {
emit(p, "%g", p->Parameters->Parameters[GET_UREG_NR(arg)].Values[src]);
return;
}
print_reg( p, arg );
switch (src){
case _X: emit(p, "[0]"); break;
case _Y: emit(p, "[1]"); break;
case _Z: emit(p, "[2]"); break;
case _W: emit(p, "[3]"); break;
}
}
static int print_reg_memdisp(struct string *str, struct insn *insn)
{
print_reg(str, &insn->src);
str_append(str, ", (");
print_imm(str, &insn->dest);
return str_append(str, ")");
}
void print_alu(char *rega, char *regb, char * accumulator, char flags[]) {
printf("Register A: ");
print_reg(rega);
printf("Register B: ");
print_reg(regb);
printf("Accumulator: ");
print_reg(accumulator);
printf("Carryflag: %c\n", getCarryflag(flags));
printf("Signflag: %c\n", getSignflag(flags));
printf("Zeroflag: %c\n", getZeroflag(flags));
printf("Overflowflag: %c\n", getOverflowflag(flags));
printf("***********************\n");
}
static int print_call_reg(struct string *str, struct insn *insn)
{
print_func_name(str);
str_append(str, "(");
print_reg(str, &insn->dest);
return str_append(str, ")");
}
static int print_tlmemdisp_reg(struct string *str, struct insn *insn)
{
str_append(str, "gs:(");
print_imm(str, &insn->src);
str_append(str, "), ");
return print_reg(str, &insn->dest);
}
static int print_ic_call(struct string *str, struct insn *insn)
{
print_func_name(str);
print_reg(str, &insn->src);
str_append(str, ", ");
print_imm(str, &insn->dest);
return str_append(str, "<%s>", ((struct vm_method *)insn->dest.imm)->name);
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void) {
#if REPORT_HARD_FAULT_REGS
uint32_t cfsr = SCB->CFSR;
print_reg("HFSR ", SCB->HFSR);
print_reg("CFSR ", cfsr);
if (cfsr & 0x80) {
print_reg("MMFAR ", SCB->MMFAR);
}
if (cfsr & 0x8000) {
print_reg("BFAR ", SCB->BFAR);
}
#endif // REPORT_HARD_FAULT_REGS
/* Go to infinite loop when Hard Fault exception occurs */
while (1) {
__fatal_error("HardFault");
}
}
int tcc_reg(int argc, char *argv[])
{
int ret = -1;
int fd = -1;
struct tccreg_data reg_data;
memset(®_data, 0, sizeof(struct tccreg_data));
if (reg_parse_args(argc, argv, ®_data) == 0) {
help_reg_msg(argv[0]);
return ret;
}
fd = open("/dev/tccreg", O_RDWR);
if (fd != -1) {
unsigned int param_arr[2];
param_arr[0] = reg_data.addr;
param_arr[1] = reg_data.value;
switch (reg_data.mode) {
case 'w':
ioctl(fd, 1, param_arr);
break;
case 't':
ioctl(fd, 0, param_arr);
param_arr[1] ^= (1 << reg_data.value);
ioctl(fd, 1, param_arr);
break;
case 's':
ioctl(fd, 0, param_arr);
param_arr[1] |= (1 << reg_data.value);
ioctl(fd, 1, param_arr);
break;
case 'c':
ioctl(fd, 0, param_arr);
param_arr[1] &= ~(1 << reg_data.value);
ioctl(fd, 1, param_arr);
break;
case 'r':
default:
break;
}
ioctl(fd, 0, param_arr);
printf("\n");
printf("===== reg[0x%08X], value[0x%08X] =====\n", param_arr[0], param_arr[1]);
print_reg(param_arr[1]);
close(fd);
}
ret = 1;
return ret;
}
void print_regs(const struct user_regs_struct *regs)
{
unsigned int i;
for (i = 0; i < sizeof(*regs) / sizeof(long); ++i) {
print_reg(regs, i);
if (((i+1) % 3) == 0)
iprintf("\n");
}
if ((i % 3) != 0)
iprintf("\n");
}
void dbg_reply_get_reg(struct dbg_context* dbg, dbg_regvalue_t value)
{
char buf[32];
assert(DREQ_GET_REG == dbg->req.type);
print_reg(value, buf);
write_packet(dbg, buf);
consume_request(dbg);
}
static inline void s3c_spi_stop(struct s3c_spi *spi, int ret)
{
writel(0x0, spi->regs + S3C_SPI_INT_EN);
writel(0x1f, spi->regs + S3C_PENDING_CLR);
writel(0x0, spi->regs + S3C_CH_CFG);
s3c_spi_done(spi);
spi->state = STATE_IDLE;
s3c_spi_master_complete(spi, ret);
print_reg(spi);
up(&spi->sem);
}
/* spi_s3c_irq_nextbyte
*
* process an interrupt and work out what to do
*/
static void spi_s3c_irq_nextbyte(struct s3c_spi *spi, unsigned long spsta)
{
DBG("spi->state = %d \n",spi->state);
switch (spi->state) {
case STATE_IDLE:
DBG("%s: called in STATE_IDLE\n", __FUNCTION__);
break;
case STATE_STOP:
udelay(200);
s3c_spi_stop(spi, 0);
DBG("%s: called in STATE_STOP\n", __FUNCTION__);
break;
case STATE_XFER_TX:
print_reg(spi);
DBG("msg_ptr = 0x%x, len = 0x%x \n", spi->msg_ptr ,spi->msg->len);
while(!(tx_msgend(spi)))
s3c_spi_write_fifo(spi);
print_reg(spi);
spi->state = STATE_STOP;
break;
case STATE_XFER_RX:
print_reg(spi);
DBG("msg_rd_ptr = 0x%x, len = 0x%x \n", spi->msg_rd_ptr ,spi->msg->len);
while(!(rx_msgend(spi))) {
spi->msg->rbuf[spi->msg_rd_ptr++] = readl(spi->regs + S3C_SPI_RX_DATA);
DBG("msg_rd_ptr = 0x%x, len = 0x%x \n", spi->msg_rd_ptr ,spi->msg->len);
DBG("msg_rbuf = 0x%x\n", spi->msg->rbuf[spi->msg_rd_ptr - 1]);
}
DBG("msg_rd_ptr = 0x%x, len = 0x%x \n", spi->msg_rd_ptr ,spi->msg->len);
print_reg(spi);
s3c_spi_stop(spi, 0);
break;
default:
dev_err(spi->dev, "%s: called with Invalid option\n", __FUNCTION__);
}
return;
}
/*
* Run the CPU emulation endless
*/
void do_go(void)
{
cont:
cpu_state = CONTIN_RUN;
cpu_error = NONE;
cpu();
if (cpu_error == OPHALT)
if (handel_break())
if (!cpu_error)
goto cont;
cpu_err_msg();
print_head();
print_reg();
}
void final_exception_handler(register_t reg) {
if(reg.int_no < 32) {
set_curr_color(LIGHT_RED);
qemu_printf("EXCEPTION: %s (err code is %x)\n", exception_messages[reg.int_no], reg.err_code);
print_reg(®);
set_curr_color(WHITE);
for(;;);
}
if(interrupt_handlers[reg.int_no] != NULL) {
isr_t handler = interrupt_handlers[reg.int_no];
handler(®);
}
}
/*
* Execute a single step
*/
void do_step(void)
{
BYTE *p;
cpu_state = SINGLE_STEP;
cpu_error = NONE;
cpu();
if (cpu_error == OPHALT)
handel_break();
cpu_err_msg();
print_head();
print_reg();
p = PC;
disass(&p, p - ram);
}
static void
print_vector_source(ppir_codegen_vec4_reg reg, const char *special,
uint8_t swizzle, bool abs, bool neg)
{
if (neg)
printf("-");
if (abs)
printf("abs(");
print_reg(reg, special);
print_swizzle(swizzle);
if (abs)
printf(")");
}
void dbg_reply_get_regs(struct dbg_context* dbg,
const struct dbg_regfile* file)
{
/* XXX this will be wrong on x64 WINNT */
char buf[1 + DREG_NUM_LINUX_I386 * 2 * sizeof(long)];
int i;
assert(DREQ_GET_REGS == dbg->req.type);
for (i = 0; i < DREG_NUM_LINUX_I386; ++i) {
print_reg(file->regs[i], &buf[i * 2 * sizeof(long)]);
}
write_packet(dbg, buf);
consume_request(dbg);
}
/*
* Run the CPU emulation endless
*/
static void do_go(char *s)
{
while (isspace((int)*s))
s++;
if (isxdigit((int)*s))
PC = ram + exatoi(s);
cont:
cpu_state = CONTIN_RUN;
cpu_error = NONE;
cpu();
if (cpu_error == OPHALT)
if (handel_break())
if (!cpu_error)
goto cont;
cpu_err_msg();
print_head();
print_reg();
}
/* s3c_spi_xfer
*
* first port of call from the spi bus code when an message needs
* transfering across the spi bus.
*/
static int s3c_spi_xfer(struct spi_dev *spi_dev,
struct spi_msg msgs[], int num)
{
struct s3c_spi *spi = (struct s3c_spi *)spi_dev->algo_data;
int retry;
int ret;
for (retry = 0; retry < spi_dev->retries; retry++) {
ret = s3c_spi_doxfer(spi, msgs, num);
print_reg(spi);
if (ret != -EAGAIN)
return ret;
printk("Retrying transmission (%d)\n", retry);
udelay(100);
}
return -EREMOTEIO;
}
static ssize_t fs_write (struct file * a, const char * data, size_t size, loff_t * b)
{
unsigned long copy=0;
char buf[1024];
Write_a* wrA=(Write_a*)buf;
copy = copy_from_user(buf, data, size);
if (copy){
print("copy failed!\n");
return -1;
}
if (size != sizeof(Write_a)){
print("size err size:%d\n",size);
return -1;
}
if (wrA->ops == 0)
print_reg(wrA->name,wrA->addr);
else if (wrA->ops == 1)
write_reg(wrA->name,wrA->addr,wrA->val);
return size;
}
/*
* Execute a single step
*/
static void do_step(void)
{
BYTE *p;
cpu_state = SINGLE_STEP;
cpu_error = NONE;
switch(cpu) {
case Z80:
cpu_z80();
break;
case I8080:
cpu_8080();
break;
}
if (cpu_error == OPHALT)
handel_break();
cpu_err_msg();
print_head();
print_reg();
p = mem_base() + PC;
disass(&p, PC);
}
void HardFault_C_Handler(ExceptionRegisters_t *regs) {
if (!pyb_hard_fault_debug) {
NVIC_SystemReset();
}
#if MICROPY_HW_ENABLE_USB
// We need to disable the USB so it doesn't try to write data out on
// the VCP and then block indefinitely waiting for the buffer to drain.
pyb_usb_flags = 0;
#endif
mp_hal_stdout_tx_str("HardFault\r\n");
print_reg("R0 ", regs->r0);
print_reg("R1 ", regs->r1);
print_reg("R2 ", regs->r2);
print_reg("R3 ", regs->r3);
print_reg("R12 ", regs->r12);
print_reg("SP ", (uint32_t)regs);
print_reg("LR ", regs->lr);
print_reg("PC ", regs->pc);
print_reg("XPSR ", regs->xpsr);
uint32_t cfsr = SCB->CFSR;
print_reg("HFSR ", SCB->HFSR);
print_reg("CFSR ", cfsr);
if (cfsr & 0x80) {
print_reg("MMFAR ", SCB->MMFAR);
}
if (cfsr & 0x8000) {
print_reg("BFAR ", SCB->BFAR);
}
if ((void*)&_ram_start <= (void*)regs && (void*)regs < (void*)&_ram_end) {
mp_hal_stdout_tx_str("Stack:\r\n");
uint32_t *stack_top = &_estack;
if ((void*)regs < (void*)&_heap_end) {
// stack not in static stack area so limit the amount we print
stack_top = (uint32_t*)regs + 32;
}
for (uint32_t *sp = (uint32_t*)regs; sp < stack_top; ++sp) {
print_hex_hex(" ", (uint32_t)sp, *sp);
}
}
/* Go to infinite loop when Hard Fault exception occurs */
while (1) {
__fatal_error("HardFault");
}
}
static void print_des_reg(void)
{
print_reg(rd);
}
static void print_src_reg(void)
{
print_reg(rs);
}
void VMDisasm(FILE *out, const VMOP *code, int codesize, const VMScriptFunction *func)
{
VMFunction *callfunc;
const char *callname;
const char *name;
int col;
int mode;
int a;
bool cmp;
char cmpname[8];
for (int i = 0; i < codesize; ++i)
{
name = OpInfo[code[i].op].Name;
mode = OpInfo[code[i].op].Mode;
a = code[i].a;
cmp = (mode & MODE_ATYPE) == MODE_ACMP;
// String comparison encodes everything in a single instruction.
if (code[i].op == OP_CMPS)
{
switch (a & CMP_METHOD_MASK)
{
case CMP_EQ: name = "beq"; break;
case CMP_LT: name = "blt"; break;
case CMP_LE: name = "ble"; break;
}
mode = MODE_AIMMZ;
mode |= (a & CMP_BK) ? MODE_BKS : MODE_BS;
mode |= (a & CMP_CK) ? MODE_CKS : MODE_CS;
a &= CMP_CHECK | CMP_APPROX;
cmp = true;
}
if (cmp)
{ // Comparison instruction. Modify name for inverted test.
if (!(a & CMP_CHECK))
{
strcpy(cmpname, name);
if (name[1] == 'e')
{ // eq -> ne
cmpname[1] = 'n', cmpname[2] = 'e';
}
else if (name[2] == 't')
{ // lt -> ge
cmpname[1] = 'g', cmpname[2] = 'e';
}
else
{ // le -> gt
cmpname[1] = 'g', cmpname[2] = 't';
}
name = cmpname;
}
}
printf_wrapper(out, "%08x: %02x%02x%02x%02x %-8s", i << 2, code[i].op, code[i].a, code[i].b, code[i].c, name);
col = 0;
switch (code[i].op)
{
case OP_JMP:
case OP_TRY:
col = printf_wrapper(out, "%08x", (i + 1 + code[i].i24) << 2);
break;
case OP_PARAMI:
col = printf_wrapper(out, "%d", code[i].i24);
break;
case OP_CALL_K:
case OP_TAIL_K:
callfunc = (VMFunction *)func->KonstA[code[i].a].o;
callname = callfunc->Name != NAME_None ? callfunc->Name : "[anonfunc]";
col = printf_wrapper(out, "%.23s,%d", callname, code[i].b);
if (code[i].op == OP_CALL_K)
{
col += printf_wrapper(out, ",%d", code[i].c);
}
break;
case OP_RET:
if (code[i].b != REGT_NIL)
{
if (a == RET_FINAL)
{
col = print_reg(out, 0, code[i].i16u, MODE_PARAM, 16, func);
}
else
{
col = print_reg(out, 0, a & ~RET_FINAL, (mode & MODE_ATYPE) >> MODE_ASHIFT, 24, func);
col += print_reg(out, col, code[i].i16u, MODE_PARAM, 16, func);
if (a & RET_FINAL)
{
col += printf_wrapper(out, " [final]");
}
}
}
break;
case OP_RETI:
if (a == RET_FINAL)
{
col = printf_wrapper(out, "%d", code[i].i16);
}
else
{
col = print_reg(out, 0, a & ~RET_FINAL, (mode & MODE_ATYPE) >> MODE_ASHIFT, 24, func);
col += print_reg(out, col, code[i].i16, MODE_IMMS, 16, func);
if (a & RET_FINAL)
{
col += printf_wrapper(out, " [final]");
}
}
break;
case OP_FLOP:
col = printf_wrapper(out, "f%d,f%d,%d", code[i].a, code[i].b, code[i].c);
if (code[i].c < countof(FlopNames))
{
col += printf_wrapper(out, " [%s]", FlopNames[code[i].c]);
}
break;
default:
if ((mode & MODE_BCTYPE) == MODE_BCCAST)
{
switch (code[i].c)
{
case CAST_I2F:
mode = MODE_AF | MODE_BI | MODE_CUNUSED;
break;
case CAST_I2S:
mode = MODE_AS | MODE_BI | MODE_CUNUSED;
break;
case CAST_F2I:
mode = MODE_AI | MODE_BF | MODE_CUNUSED;
break;
case CAST_F2S:
mode = MODE_AS | MODE_BF | MODE_CUNUSED;
break;
case CAST_P2S:
mode = MODE_AS | MODE_BP | MODE_CUNUSED;
break;
case CAST_S2I:
mode = MODE_AI | MODE_BS | MODE_CUNUSED;
break;
case CAST_S2F:
mode = MODE_AF | MODE_BS | MODE_CUNUSED;
break;
default:
mode = MODE_AX | MODE_BX | MODE_CIMMZ;
break;
}
}
col = print_reg(out, 0, a, (mode & MODE_ATYPE) >> MODE_ASHIFT, 24, func);
if ((mode & MODE_BCTYPE) == MODE_BCTHROW)
{
if (code[i].a == 0)
{
mode = (MODE_BP | MODE_CUNUSED);
}
else if (code[i].a == 1)
{
mode = (MODE_BKP | MODE_CUNUSED);
}
else
{
mode = (MODE_BCJOINT | MODE_BCIMMS);
}
}
else if ((mode & MODE_BCTYPE) == MODE_BCCATCH)
{
switch (code[i].a)
{
case 0:
mode = MODE_BUNUSED | MODE_CUNUSED;
break;
case 1:
mode = MODE_BUNUSED | MODE_CP;
break;
case 2:
mode = MODE_BP | MODE_CP;
break;
case 3:
mode = MODE_BKP | MODE_CP;
break;
default:
mode = MODE_BIMMZ | MODE_CIMMZ;
break;
}
}
if ((mode & (MODE_BTYPE | MODE_CTYPE)) == MODE_BCJOINT)
{
col += print_reg(out, col, code[i].i16u, (mode & MODE_BCTYPE) >> MODE_BCSHIFT, 16, func);
}
else
{
col += print_reg(out, col, code[i].b, (mode & MODE_BTYPE) >> MODE_BSHIFT, 24, func);
col += print_reg(out, col, code[i].c, (mode & MODE_CTYPE) >> MODE_CSHIFT, 24, func);
}
break;
}
static void print_reg_src(reg_t reg, bool full, bool r, bool c, bool im,
bool neg, bool abs, bool addr_rel)
{
print_reg(reg, full, r, c, im, neg, abs, addr_rel);
}
static void print_reg_dst(reg_t reg, bool full, bool addr_rel)
{
print_reg(reg, full, false, false, false, false, false, addr_rel);
}
