static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
print_spew("SMBus controller enabled\n");
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
print_debug_hex32(pci_read_config32(dev, 0x20));
/* Set smbus enable */
pci_write_config8(dev, 0x40, 1);
/* Set smbus iospace enable */
pci_write_config8(dev, 0x4, 1);
/* SMBALERT_DIS */
pci_write_config8(dev, 0x11, 4);
/* Disable interrupt generation */
outb(0, SMBUS_IO_BASE + SMBHSTCTL);
/* clear any lingering errors, so the transaction will run */
outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
}
static void enable_smbus(void)
{
device_t dev;
uint8_t enable;
dev = pci_locate_device(PCI_ID(0x1022, 0x746b), 0);
if (dev == PCI_DEV_INVALID) {
die("SMBUS controller not found\n");
}
pci_write_config32(dev, 0x58, SMBUS_IO_BASE | 1);
enable = pci_read_config8(dev, 0x41);
pci_write_config8(dev, 0x41, enable | (1 << 7));
/* check that we can see the smbus controller I/O. */
if (inw(SMBUS_IO_BASE)==0xFF){
die("SMBUS controller I/O not found\n");
}
/* clear any lingering errors, so the transaction will run */
outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
print_spew("SMBus controller enabled\n");
}
