/* Choose cold or warm reset * RST_TIME1>4ms will trigger CPCAP to trigger a system cold reset */ static void mapphone_pm_set_reset(char cold) { if (cold) { /* Configure RST_TIME1 to 6ms */ prm_rmw_mod_reg_bits(OMAP_RSTTIME1_MASK, 0xc8<<OMAP_RSTTIME1_SHIFT, OMAP3430_GR_MOD, OMAP3_PRM_RSTTIME_OFFSET); } else { /* Configure RST_TIME1 to 30us */ prm_rmw_mod_reg_bits(OMAP_RSTTIME1_MASK, 0x01<<OMAP_RSTTIME1_SHIFT, OMAP3430_GR_MOD, OMAP3_PRM_RSTTIME_OFFSET); } }
int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) { prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, (pwrst << OMAP_POWERSTATE_SHIFT), pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; }
int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm) { prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK, (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT), pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; }
static int omap2_enable_osc_ck(struct clk *clk) { prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, 0, OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKSRC_CTRL_OFFSET); return 0; }
int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) { u32 v; v = pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE_MASK); prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE_MASK, v, pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; }
int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) { u32 m; m = _get_mem_bank_retst_mask(bank); prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; }
int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) { u32 reg; prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK, 0x3 << OMAP4430_LASTPOWERSTATEENTERED_SHIFT, pwrdm->prcm_offs, OMAP4_PM_PWSTST); reg = prm_read_mod_reg(pwrdm->prcm_offs, pwrdm->context_offset); prm_write_mod_reg(reg, pwrdm->prcm_offs, pwrdm->context_offset); return 0; }
int omap4_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) { prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0, pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL); return 0; }
static void omap2_disable_osc_ck(struct clk *clk) { prm_rmw_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, OMAP_AUTOEXTCLKMODE_MASK, OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKSRC_CTRL_OFFSET); }
int omap2_pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) { return prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); }