/* Triggered when Timer 0 reaches 0. */
void __hw_clock_source_irq(void)
{
/* Make sure that the interrupt actually fired. */
if (!(ROTOR_MCU_TMR_TNIS(0) & (1 << 0)))
return;
/*
* Clear the interrupt by reading the TNEOI register. Reading from this
* register returns all zeroes.
*/
if (ROTOR_MCU_TMR_TNEOI(0))
;
#ifdef BOARD_REI
/* Process timers indicating the overflow event. */
process_timers(1);
#else
rollover_cnt++;
if (rollover_cnt >= (clock_get_freq() / 1000000)) {
/* Process timers indicating the overflow event. */
process_timers(1);
rollover_cnt = 0;
} else {
process_timers(0);
}
#endif /* defined(BOARD_REI) */
}
/* This handles rollover in the HW timer */
void __hw_clock_source_irq(void)
{
/* Clear the interrupt */
GR_TIMEHS_INTCLR(0, 1) = 0x1;
/* The one-tick-per-clock HW counter has rolled over. */
hw_rollover_count++;
/* Has the system's usec counter rolled over? */
if (hw_rollover_count >= clock_mul_factor) {
hw_rollover_count = 0;
process_timers(1);
} else {
process_timers(0);
}
}
int
sel_select(selector_t *sel,
sel_send_sig_cb send_sig,
long thread_id,
void *cb_data,
struct timeval *timeout)
{
int err;
struct timeval loc_timeout;
sel_wait_list_t wait_entry;
if (sel->have_timer_lock)
sel->os_hnd->lock(sel->os_hnd, sel->timer_lock);
process_timers(sel, (struct timeval *)(&loc_timeout));
if (timeout) {
if (cmp_timeval((struct timeval *)(&loc_timeout), timeout) >= 0)
memcpy(&loc_timeout, timeout, sizeof(loc_timeout));
}
add_sel_wait_list(sel, &wait_entry, send_sig, cb_data, thread_id,
&loc_timeout);
if (sel->have_timer_lock)
sel->os_hnd->unlock(sel->os_hnd, sel->timer_lock);
err = process_fds(sel, send_sig, thread_id, cb_data, &loc_timeout);
if (sel->have_timer_lock)
sel->os_hnd->lock(sel->os_hnd, sel->timer_lock);
remove_sel_wait_list(sel, &wait_entry);
if (sel->have_timer_lock)
sel->os_hnd->unlock(sel->os_hnd, sel->timer_lock);
return err;
}
void handle_alarm(void) {
int new_timeout = 0;
/* We need to adjust for any time that might be remaining on the alarm,
* in case we were called in order to change alarm durations. Note
* that rapid-fire calling of this function will probably screw
* up the already poor resolution of alarm() _horribly_. Oh well,
* this shouldn't be used for any precise work anyway, it's only
* for modules to perform approximate timing.
*/
/* It's possible that alarms are blocked when this function is
* called, if so, increment alarm_pending and exit swiftly
*/
while (nalarms) {
nalarms = 0;
if (!alarms_blocked) {
int alarm_elapsed;
alarm(0);
alarm_elapsed = _alarmed_time ? (int) time(NULL) - _alarmed_time : 0;
new_timeout = _total_time + alarm_elapsed;
_total_time = 0;
new_timeout = process_timers(new_timeout);
_alarmed_time = time(NULL);
alarm(_current_timeout = new_timeout);
} else {
alarm_pending++;
}
}
}
/* Irq for hwtimer event */
void __hw_clock_event_irq(void)
{
/* ITIM event module disable */
CLEAR_BIT(NPCX_ITCTS(ITIM_EVENT_NO), NPCX_ITCTS_ITEN);
/* Disable interrupt of event */
task_disable_irq(ITIM16_INT(ITIM_EVENT_NO));
/* Clear timeout status for event */
SET_BIT(NPCX_ITCTS(ITIM_EVENT_NO), NPCX_ITCTS_TO_STS);
/* Clear event parameters */
evt_expired_us = 0;
evt_cnt = 0;
/* handle upper driver */
process_timers(0);
#ifdef CONFIG_LOW_POWER_IDLE
/*
* Set event for ITIM32 after process_timers() since no events set if
* event's deadline is over 32 bits but current source clock isn't.
* ITIM32 is based on apb2 and ec won't wake-up in deep-idle even if it
* expires.
*/
if (evt_expired_us == 0)
__hw_clock_event_set(EVT_MAX_EXPIRED_US);
#endif
}
void timer_tick(void)
{
/* Update the ticks counter. */
swks.system_ticks_64++;
process_timers();
}
static int l_update(lua_State *L)
{
unsigned long now = (unsigned long)times(0);
if (get_next_timeout(&timers, now) == 0)
process_timers(&timers, now);
return 0;
}
/* Irq for hwtimer tick */
void __hw_clock_source_irq(void)
{
/* Is timeout trigger trigger? */
if (IS_BIT_SET(NPCX_ITCTS(ITIM32), NPCX_ITCTS_TO_STS)) {
/* Restore ITIM32 preload counter value to maximum value */
hw_clock_source_set_preload(0, 1);
/* 32-bits timer count overflow */
process_timers(1);
} else { /* Handle soft trigger */
process_timers(0);
#ifdef CONFIG_LOW_POWER_IDLE
/* Set event for ITIM32. Please see above for detail */
if (evt_expired_us == 0)
__hw_clock_event_set(EVT_MAX_EXPIRED_US);
#endif
}
}
/* Triggered when Timer 1 reaches 0. */
void __hw_clock_event_irq(void)
{
/*
* Clear the event which disables the timer and clears the pending
* interrupt.
*/
__hw_clock_event_clear();
/* Process timers now. */
process_timers(0);
}
static void irq_tc(void) {
tcTicks++;
// overflow control
if(tcTicks > tcMax) {
tcTicks = 0;
tcOverflow = 1;
} else {
tcOverflow = 0;
}
process_timers();
// clear interrupt flag by reading timer SR
tc_read_sr(APP_TC, APP_TC_CHANNEL);
}
static int jiveL_process_events(lua_State *L) {
Uint32 r = 0;
SDL_Event event;
/* stack:
* 1 : jive.ui.Framework
*/
JIVEL_STACK_CHECK_BEGIN(L);
/* Exit if we have no windows */
lua_getfield(L, 1, "windowStack");
if (lua_objlen(L, -1) == 0) {
lua_pop(L, 1);
lua_pushboolean(L, 0);
return 1;
}
lua_rawgeti(L, -1, 1);
/* pump keyboard/mouse events once per frame */
SDL_PumpEvents();
if (jive_sdlevent_pump) {
jive_sdlevent_pump(L);
}
/* process events */
process_timers(L);
while (SDL_PeepEvents(&event, 1, SDL_GETEVENT, SDL_ALLEVENTS) > 0 ) {
r |= process_event(L, &event);
}
lua_pop(L, 2);
JIVEL_STACK_CHECK_END(L);
if (r & JIVE_EVENT_QUIT) {
lua_pushboolean(L, 0);
return 1;
}
lua_pushboolean(L, 1);
return lua_yield(L, 1);
}
static void free_run_timer_overflow(void)
{
/*
* If timer 4 (TIMER_H) counter register != 0xffffffff.
* This usually happens once after sysjump, force time, and etc.
* (when __hw_clock_source_set is called and param 'ts' != 0)
*/
if (IT83XX_ETWD_ETXCNTLR(FREE_EXT_TIMER_H) != 0xffffffff) {
/* set timer counter register */
IT83XX_ETWD_ETXCNTLR(FREE_EXT_TIMER_H) = 0xffffffff;
/* bit[1], timer reset */
IT83XX_ETWD_ETXCTRL(FREE_EXT_TIMER_L) |= (1 << 1);
}
/* w/c interrupt status */
task_clear_pending_irq(et_ctrl_regs[FREE_EXT_TIMER_H].irq);
/* timer overflow */
process_timers(1);
update_exc_start_time();
}
static void irq_tc(void) {
tcTicks++;
// overflow control
if(tcTicks > tcMax) {
tcTicks = 0;
tcOverflow = 1;
} else {
tcOverflow = 0;
}
process_timers();
if(tog) {
tog = 0;
gpio_clr_gpio_pin(LED_MODE_PIN);
} else {
tog = 1;
gpio_set_gpio_pin(LED_MODE_PIN);
}
// clear interrupt flag by reading timer SR
tc_read_sr(APP_TC, APP_TC_CHANNEL);
}
static void __hw_clock_source_irq(void)
{
/* Determine interrupt number. */
int irq = IT83XX_INTC_IVCT3 - 16;
/* SW/HW interrupt of event timer. */
if ((get_sw_int() == et_ctrl_regs[EVENT_EXT_TIMER].irq) ||
(irq == et_ctrl_regs[EVENT_EXT_TIMER].irq)) {
IT83XX_ETWD_ETXCNTLR(EVENT_EXT_TIMER) = 0xffffffff;
IT83XX_ETWD_ETXCTRL(EVENT_EXT_TIMER) |= (1 << 1);
event_timer_clear_pending_isr();
process_timers(0);
return;
}
#ifdef CONFIG_WATCHDOG
/*
* Both the external timer for the watchdog warning and the HW timer
* go through this irq. So, if this interrupt was caused by watchdog
* warning timer, then call that function.
*/
if (irq == et_ctrl_regs[WDT_EXT_TIMER].irq) {
watchdog_warning_irq();
return;
}
#endif
#ifdef CONFIG_FANS
if (irq == et_ctrl_regs[FAN_CTRL_EXT_TIMER].irq) {
fan_ext_timer_interrupt();
return;
}
#endif
/* Interrupt of free running timer TIMER_H. */
if (irq == et_ctrl_regs[FREE_EXT_TIMER_H].irq) {
free_run_timer_overflow();
return;
}
}
void mainloop()
{
int got;
int u = 1;
int z = 0;
int o = 0;
for(;;)
{
o++;
if (o == 1000) {
got = getch();
if (got != ERR) {
EMU_DEBUG("got: %x", got);
if (got == 'a')
{
ppi_write_port_a(0x3b);
pic_interrupt(1);
} else
{
ppi_write_port_a(0x3b | 0x80);
pic_interrupt(1);
}
}
o= 0;
}
z++;
process_timers(50);
cpu_exec_in();
pit_tick();
if (z == 100000)
{
z = 0;
mda_textmode_out();
}
u++;
if (u > 3) u=1;
if (!(u % 2))
pit_tick();
}
}
/* The main loop for the program. This will select on the various
sets, then scan for any available I/O to process. It also monitors
the time and call the timeout handlers periodically. */
int
sel_select_loop(selector_t *sel,
sel_send_sig_cb send_sig,
long thread_id,
void *cb_data)
{
int err;
sel_wait_list_t wait_entry;
struct timeval loc_timeout;
for (;;) {
if (sel->have_timer_lock)
sel->os_hnd->lock(sel->os_hnd, sel->timer_lock);
process_timers(sel, &loc_timeout);
add_sel_wait_list(sel, &wait_entry, send_sig, cb_data, thread_id,
&loc_timeout);
if (sel->have_timer_lock)
sel->os_hnd->unlock(sel->os_hnd, sel->timer_lock);
err = process_fds(sel, send_sig, thread_id, cb_data, &loc_timeout);
if (sel->have_timer_lock)
sel->os_hnd->lock(sel->os_hnd, sel->timer_lock);
remove_sel_wait_list(sel, &wait_entry);
if (sel->have_timer_lock)
sel->os_hnd->unlock(sel->os_hnd, sel->timer_lock);
if ((err < 0) && (errno != EINTR)) {
err = errno;
/* An error occurred. */
/* An error is bad, we need to abort. */
syslog(LOG_ERR, "select_loop() - select: %m");
return err;
}
}
}
/*
* Handle event matches. It's lower priority than the HW rollover irq, so it
* will always be either before or after a rollover exception.
*/
void __hw_clock_event_irq(void)
{
__hw_clock_event_clear();
process_timers(0);
}
/**
* \brief Handler for System Tick interrupt.
*
* Process System Tick Event.
* Increment the ul_ms_ticks counter.
*/
void SysTick_Handler(void)
{
g_ul_tick_count++;
ul_ms_ticks++; //jsi 6feb16
timerTickCount++;
timerTickCount &= MAX_TICK; // force rollover at this count to avoid confusion detecting rollover with the MSbit set
if (timerTickCount == 0)
{
rollover = 1;
}
if ((timerTickCount % TICKS_PER_SEC) == 0)
{
process_timers();
}
if (controls.buzzer_enable)
{
if (controls.buzzer_cycle == CYCLE_ON)
{
if (controls.buzzer_dur_count++ > controls.buzzer_on_dur)
{
if (controls.buzzer_repeat_count++ >= controls.buzzer_repeat)
{
controls.buzzer_enable = 0;
pwm_channel_disable(PWM0, PIN_PWM_LED0_CHANNEL);
}
else
{
controls.buzzer_dur_count = 0;
controls.buzzer_cycle = CYCLE_OFF;
pwm_channel_disable(PWM0, PIN_PWM_LED0_CHANNEL);
}
}
}
else
{
if (controls.buzzer_dur_count++ > controls.buzzer_off_dur)
{
controls.buzzer_dur_count = 0;
controls.buzzer_cycle = CYCLE_ON;
pwm_channel_enable(PWM0, PIN_PWM_LED0_CHANNEL);
}
}
}
if (controls.solenoid_enable)
{
controls.solenoid_count++;
if (controls.solenoid_cycle == CYCLE_ON)
{
if (controls.solenoid_count > SOLENOID_ON_COUNT)
{
controls.solenoid_count = 0;
controls.solenoid_cycle = CYCLE_OFF;
controls.solenoid_enable = 0; //solenoid is a one-shot
ioport_set_pin_level(ECLAVE_SOLENOID, IOPORT_PIN_LEVEL_LOW);
}
}
else
{
if (controls.solenoid_count > SOLENOID_OFF_COUNT)
{
controls.solenoid_count = 0;
controls.solenoid_cycle = CYCLE_ON;
ioport_set_pin_level(ECLAVE_SOLENOID, IOPORT_PIN_LEVEL_HIGH);
}
}
}
}
static int wait_for_stdin(void)
{
int fd;
int mask;
int fd_stdin = fileno(stdin);
int ready;
int nfds;
long int waittime;
fd_set readfds;
fd_set writefds;
fd_set errorfds;
struct timeval timeout;
struct timeval* ptimeout;
SocketObject* socket;
PyGILState_STATE gstate;
PyObject* exception_type;
PyObject* exception_value;
PyObject* exception_traceback;
PyObject* result;
PyObject* arguments;
while (1) {
nfds = set_fds(&readfds, &writefds, &errorfds);
FD_SET(fd_stdin, &readfds);
if (fd_stdin >= nfds) nfds = fd_stdin + 1;
waittime = process_timers();
if (waittime == ULONG_MAX) ptimeout = NULL;
else {
timeout.tv_sec = waittime / 1000;
timeout.tv_usec = 1000 * (waittime % 1000);
ptimeout = &timeout;
}
if (select(nfds, &readfds, &writefds, &errorfds, ptimeout)==-1)
{
if (errno==EINTR) raise(SIGINT);
return -1;
}
if (FD_ISSET(fd_stdin, &readfds)) break;
socket = notifier.firstSocket;
while (socket)
{
ready = 0;
fd = socket->fd;
mask = socket->mask;
switch (mask) {
case PyEvents_READABLE: ready = FD_ISSET(fd, &readfds); break;
case PyEvents_WRITABLE: ready = FD_ISSET(fd, &writefds); break;
case PyEvents_EXCEPTION: ready = FD_ISSET(fd, &errorfds); break;
}
if (ready) {
gstate = PyGILState_Ensure();
PyErr_Fetch(&exception_type, &exception_value, &exception_traceback);
result = NULL;
arguments = Py_BuildValue("(ii)", fd, mask);
if (arguments) {
PyObject* callback = socket->callback;
result = PyEval_CallObject(callback, arguments);
Py_DECREF(arguments);
}
if (result) Py_DECREF(result);
else PyErr_Print();
PyErr_Restore(exception_type, exception_value, exception_traceback);
PyGILState_Release(gstate);
}
socket = socket->next;
}
}
return 1;
}