/* must be called before interrupts are enabled */
void time_init(void) {
use_pvclock = !pvclock_init();
if (!use_pvclock) {
assert(tscclock_init() == 0);
}
}
static void pc_init_timer(uint level) {
const struct x86_model_info* cpu_model = x86_get_model();
constant_tsc = false;
if (x86_vendor == X86_VENDOR_INTEL) {
/* This condition taken from Intel 3B 17.15 (Time-Stamp Counter). This
* is the negation of the non-Constant TSC section, since the Constant
* TSC section is incomplete (the behavior is architectural going
* forward, and modern CPUs are not on the list). */
constant_tsc = !((cpu_model->family == 0x6 && cpu_model->model == 0x9) ||
(cpu_model->family == 0x6 && cpu_model->model == 0xd) ||
(cpu_model->family == 0xf && cpu_model->model < 0x3));
}
invariant_tsc = x86_feature_test(X86_FEATURE_INVAR_TSC);
bool has_pvclock = pvclock_is_present();
if (has_pvclock) {
zx_status_t status = pvclock_init();
if (status == ZX_OK) {
invariant_tsc = pvclock_is_stable();
} else {
has_pvclock = false;
}
}
bool has_hpet = hpet_is_present();
if (has_hpet) {
calibration_clock = CLOCK_HPET;
const uint64_t hpet_ms_rate = hpet_ticks_per_ms();
ASSERT(hpet_ms_rate <= UINT32_MAX);
printf("HPET frequency: %" PRIu64 " ticks/ms\n", hpet_ms_rate);
fp_32_64_div_32_32(&ns_per_hpet, 1000 * 1000, static_cast<uint32_t>(hpet_ms_rate));
// Add 1ns to conservatively deal with rounding
ns_per_hpet_rounded_up = u32_mul_u64_fp32_64(1, ns_per_hpet) + 1;
} else {
calibration_clock = CLOCK_PIT;
}
const char* force_wallclock = cmdline_get("kernel.wallclock");
bool use_invariant_tsc = invariant_tsc && (!force_wallclock || !strcmp(force_wallclock, "tsc"));
use_tsc_deadline = use_invariant_tsc &&
x86_feature_test(X86_FEATURE_TSC_DEADLINE);
if (!use_tsc_deadline) {
calibrate_apic_timer();
}
if (use_invariant_tsc) {
calibrate_tsc(has_pvclock);
// Program PIT in the software strobe configuration, but do not load
// the count. This will pause the PIT.
outp(I8253_CONTROL_REG, 0x38);
wall_clock = CLOCK_TSC;
} else {
if (constant_tsc || invariant_tsc) {
// Calibrate the TSC even though it's not as good as we want, so we
// can still let folks still use it for cheap timing.
calibrate_tsc(has_pvclock);
}
if (has_hpet && (!force_wallclock || !strcmp(force_wallclock, "hpet"))) {
wall_clock = CLOCK_HPET;
hpet_set_value(0);
hpet_enable();
} else {
if (force_wallclock && strcmp(force_wallclock, "pit")) {
panic("Could not satisfy kernel.wallclock choice\n");
}
wall_clock = CLOCK_PIT;
set_pit_frequency(1000); // ~1ms granularity
uint32_t irq = apic_io_isa_to_global(ISA_IRQ_PIT);
zx_status_t status = register_int_handler(irq, &pit_timer_tick, NULL);
DEBUG_ASSERT(status == ZX_OK);
unmask_interrupt(irq);
}
}
printf("timer features: constant_tsc %d invariant_tsc %d tsc_deadline %d\n",
constant_tsc, invariant_tsc, use_tsc_deadline);
printf("Using %s as wallclock\n", clock_name[wall_clock]);
}
