void pwm_init(void){
*AT91C_PMC_PCER |= (1<<AT91C_ID_PWMC);
*AT91C_PIOA_PDR |= PWM_MASK;
*AT91C_PIOA_BSR |= PWM_MASK;
#if ORIGINAL_FREQ
pwm_configure_clock(0x00000014);
#elif DOUBLED_FREQ
pwm_configure_clock(0x0000060F);
#endif
pwm_configure_channel(0, AT91C_PWMC_CPRE_MCKA, 0, 1);
pwm_configure_channel(1, AT91C_PWMC_CPRE_MCKA, 0, 1);
pwm_configure_channel(2, AT91C_PWMC_CPRE_MCKA, 0, 1);
pwm_configure_channel(3, AT91C_PWMC_CPRE_MCKA, 0, 1);
pwm_set_period(0, 4800);
pwm_set_period(1, 4800);
pwm_set_period(2, 4800);
pwm_set_period(3, 4800);
pwm_set_duty_cycle(0, 0);
pwm_set_duty_cycle(1, 0);
pwm_set_duty_cycle(2, 0);
pwm_set_duty_cycle(3, 0); //here must set 0 first, or the polarity will be wrong
pwm_enable_channel(0);
pwm_enable_channel(1);
pwm_enable_channel(2);
pwm_enable_channel(3);
pwm_set_duty_cycle(0, 2400);
pwm_set_duty_cycle(1, 2400);
pwm_set_duty_cycle(2, 2400);
pwm_set_duty_cycle(3, 2400);
}
/*
* Checking that an PWM channel is enabled.
*/
void test_pwm_channel_enabled() {
pmc_enable_peripheral_clock(ID_PWM);
pwm_reset_peripheral();
pwm_enable_channel(PWM_CHANNEL_3);
TEST_ASSERT_EQUAL_HEX32(0x00000008, PWM->PWM_SR);
pwm_enable_channel(PWM_CHANNEL_4);
TEST_ASSERT_EQUAL_HEX32(0x00000018, PWM->PWM_SR);
}
void test_pwm_channel_disabled() {
pwm_reset_peripheral();
pwm_enable_channel(PWM_CHANNEL_3);
TEST_ASSERT_BITS_HIGH((1<<PWM_CHANNEL_3), PWM->PWM_SR);
pwm_disable_channel(PWM_CHANNEL_3);
TEST_ASSERT_BITS_LOW((1<<PWM_CHANNEL_3), PWM->PWM_SR);
}
void test_pwm_channel_duty_cycle() {
pwm_reset_peripheral();
pwm_set_channel_duty_cycle(PWM_CHANNEL_3, 50);
TEST_ASSERT_EQUAL_UINT32(50, pwm_read_channel(PWM_CHANNEL_3));
// change duty cycle when channel is enabled
pwm_enable_channel(PWM_CHANNEL_3);
pwm_set_channel_duty_cycle(PWM_CHANNEL_3, 60);
TEST_ASSERT_EQUAL_UINT32(60, pwm_read_channel(PWM_CHANNEL_3));
}
