static void enable_usb_vbus(void)
{
qm_gpio_port_config_t cfg = {0};
cfg.direction |= BIT(USB_VBUS_GPIO_PIN);
qm_gpio_set_config(USB_VBUS_GPIO_PORT, &cfg);
qm_gpio_set_pin(USB_VBUS_GPIO_PORT, USB_VBUS_GPIO_PIN);
}
int main(void)
{
qm_gpio_port_config_t cfg;
QM_PUTS("Starting: AON GPIO");
/* Request IRQ and write GPIO port config. */
cfg.direction = 0; /* Set all pins as inputs. */
cfg.int_en = BIT(PIN_INTR); /* Interrupt enabled. */
cfg.int_type = BIT(PIN_INTR); /* Edge sensitive interrupt. */
cfg.int_polarity = ~BIT(PIN_INTR); /* Falling edge. */
cfg.int_debounce = BIT(PIN_INTR); /* Debounce enabled. */
cfg.int_bothedge = 0; /* Both edge disabled. */
cfg.callback = aon_gpio_example_callback;
cfg.callback_data = NULL;
qm_irq_request(QM_IRQ_AON_GPIO_0_INT, qm_aon_gpio_0_isr);
qm_gpio_set_config(QM_AON_GPIO_0, &cfg);
QM_PUTS("AON GPIO set up, press 'PB0' to trigger the interrupt");
/* Wait for the AON GPIO callback to be invoked and print the status. */
while (!callback_invoked)
;
QM_PRINTF("Status of AON GPIO callback = 0x%u \n", callback_status);
QM_PUTS("Finished: AON GPIO");
return 0;
}
int main(void)
{
qm_gpio_port_config_t cfg;
sensor_activation();
QM_PUTS("Starting: Power LPSS");
/* Set GPIO pin muxing. */
qm_pmux_select(PIN_OUT, QM_PMUX_FN_0);
qm_pmux_select(PIN_INTR, QM_PMUX_FN_0);
/* Request IRQ and write GPIO port config. */
cfg.direction = BIT(PIN_OUT); /* Set PIN_OUT as output. */
cfg.int_en = BIT(PIN_INTR); /* Interrupt enabled. */
cfg.int_type = BIT(PIN_INTR); /* Edge sensitive interrupt. */
cfg.int_polarity = BIT(PIN_INTR); /* Rising edge. */
cfg.int_debounce = BIT(PIN_INTR); /* Debounce enabled. */
cfg.int_bothedge = 0x0; /* Both edge disabled. */
cfg.callback = NULL;
cfg.callback_data = NULL;
qm_irq_request(QM_IRQ_GPIO_0_INT, qm_gpio_0_isr);
qm_gpio_set_config(QM_GPIO_0, &cfg);
QM_PUTS("Go to LPSS with x86 core in C2.");
/* Wait for the Sensor Subsystem to be ready to transition to LPSS. */
while (!(QM_SCSS_GP->gps2 & QM_SCSS_GP_SENSOR_READY))
;
/*
* Go to C2. Sensor Subsystem will perform the transition to LPSS.
* Once woken up, SS will wake up the x86 core with the GPIO interrupt.
*/
power_cpu_c2();
QM_PUTS("Wake up from LPSS.");
QM_PUTS("Go to LPSS with x86 core in C2LP.");
/* Wait for the Sensor Subsystem to be ready to transition to LPSS. */
while (!(QM_SCSS_GP->gps2 & QM_SCSS_GP_SENSOR_READY))
;
/*
* Go to C2LP. Sensor Subsystem will perform the transition to LPSS.
* Once woken up, SS will wake up the x86 core with the GPIO interrupt.
*/
power_cpu_c2lp();
QM_PUTS("Wake up from LPSS.");
QM_PUTS("Finished: Power LPSS");
return 0;
}
/*
* Configure a GPIO pin (or onboard LED pin) as an output and drive an
* initial value.
*/
static void gpio_set_out(unsigned int pin, unsigned int initial_value)
{
gpio_cfg.direction = BIT(pin); /* Configure pin for output. */
qm_gpio_set_config(QM_GPIO_0, &gpio_cfg);
if (initial_value) {
qm_gpio_set_pin(QM_GPIO_0, pin);
} else {
qm_gpio_clear_pin(QM_GPIO_0, pin);
}
}
/*
* Configure a GPIO pin (or onboard LED pin) as an output and drive an
* initial value.
*/
static void gpio_set_out(unsigned int pin, unsigned int initial_value)
{
qm_pmux_select(pin, QM_PMUX_FN_0); /* Pin Muxing. */
gpio_cfg.direction = BIT(pin); /* Configure pin for output. */
qm_gpio_set_config(QM_GPIO_0, &gpio_cfg);
if (initial_value) {
qm_gpio_set_pin(QM_GPIO_0, pin);
} else {
qm_gpio_clear_pin(QM_GPIO_0, pin);
}
}
static void gpio_init()
{
gpio_cfg.direction = 0; /* Configure all pins as inputs. */
gpio_cfg.int_en = 0; /* Interrupt disabled. */
gpio_cfg.int_type = 0; /* Turn off GPIO interrupts. */
gpio_cfg.int_polarity = 0;
gpio_cfg.int_debounce = 0; /* Debounce disabled. */
gpio_cfg.int_bothedge = 0x0; /* Both edge disabled. */
gpio_cfg.callback = NULL;
gpio_cfg.callback_data = NULL;
qm_gpio_set_config(QM_GPIO_0, &gpio_cfg);
}
int main(void)
{
qm_gpio_port_config_t cfg;
QM_PUTS("AON GPIO example\n");
/* Request IRQ and write GPIO port config */
cfg.direction = 0; /* All pins are input */
cfg.int_en = BIT(PIN_INTR); /* Interrupt enabled */
cfg.int_type = BIT(PIN_INTR); /* Edge sensitive interrupt */
cfg.int_polarity = ~BIT(PIN_INTR); /* Falling edge */
cfg.int_debounce = BIT(PIN_INTR); /* Debounce enabled */
cfg.int_bothedge = 0x0; /* Both edge disabled */
cfg.callback = aon_gpio_example_callback;
qm_irq_request(QM_IRQ_AONGPIO_0, qm_aon_gpio_isr_0);
qm_gpio_set_config(QM_AON_GPIO_0, &cfg);
QM_PUTS("AON GPIO set up, press the Push Button 0 to trigger the "
"interrupt\n");
return 0;
}
static int
spi_set_gpio_ss(struct sol_spi *spi)
{
qm_gpio_port_config_t cfg;
uint32_t mask;
qm_rc_t ret;
#if QUARK_SE
spi->slave_select.port = QM_GPIO_0;
switch (spi->bus) {
case QM_SPI_MST_0:
switch (spi->slave) {
case QM_SPI_SS_0:
spi->slave_select.pin = 24;
break;
case QM_SPI_SS_1:
spi->slave_select.pin = 25;
break;
case QM_SPI_SS_2:
spi->slave_select.pin = 26;
break;
case QM_SPI_SS_3:
spi->slave_select.pin = 27;
break;
default:
return -EINVAL;
}
break;
case QM_SPI_MST_1:
switch (spi->slave) {
case QM_SPI_SS_0:
spi->slave_select.pin = 11;
break;
case QM_SPI_SS_1:
spi->slave_select.pin = 12;
break;
case QM_SPI_SS_2:
spi->slave_select.pin = 13;
break;
case QM_SPI_SS_3:
spi->slave_select.pin = 14;
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
#elif QUARK_D2000
spi->slave_select.port = QM_GPIO_0;
switch (spi->slave) {
case QM_SPI_SS_0:
spi->slave_select.pin = 0;
break;
case QM_SPI_SS_1:
spi->slave_select.pin = 1;
break;
case QM_SPI_SS_2:
spi->slave_select.pin = 2;
break;
case QM_SPI_SS_3:
spi->slave_select.pin = 3;
break;
default:
return -EINVAL;
}
#endif
mask = BIT(spi->slave_select.pin);
ret = qm_gpio_get_config(spi->slave_select.port, &cfg);
SOL_EXP_CHECK(ret != QM_RC_OK, -EIO);
cfg.direction |= mask;
cfg.int_en &= mask;
ret = qm_gpio_set_config(spi->slave_select.port, &cfg);
SOL_EXP_CHECK(ret != QM_RC_OK, -EIO);
qm_gpio_set_pin(spi->slave_select.port, spi->slave_select.pin);
return 0;
}
