static Bool
radeon_glamor_picture_prepare_access_cpu_ro(ScrnInfoPtr scrn,
PicturePtr picture)
{
PixmapPtr pixmap;
struct radeon_pixmap *priv;
if (picture->pDrawable == NULL)
return TRUE;
pixmap = get_drawable_pixmap(picture->pDrawable);
priv = radeon_get_pixmap_private(pixmap);
if (!radeon_glamor_prepare_access_cpu_ro(scrn, pixmap, priv))
return FALSE;
if (picture->alphaMap) {
pixmap = get_drawable_pixmap(picture->alphaMap->pDrawable);
priv = radeon_get_pixmap_private(pixmap);
if (!radeon_glamor_prepare_access_cpu_ro(scrn, pixmap, priv)) {
radeon_glamor_picture_finish_access_cpu(picture);
return FALSE;
}
}
return TRUE;
}
static RegionPtr
radeon_glamor_copy_area_nodstbo(DrawablePtr pSrcDrawable,
DrawablePtr pDstDrawable, GCPtr pGC,
int srcx, int srcy, int width, int height,
int dstx, int dsty)
{
ScreenPtr screen = pDstDrawable->pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
PixmapPtr src_pixmap = get_drawable_pixmap(pSrcDrawable);
PixmapPtr dst_pixmap = get_drawable_pixmap(pDstDrawable);
struct radeon_pixmap *src_priv;
RegionPtr ret = NULL;
if (src_pixmap != dst_pixmap) {
src_priv = radeon_get_pixmap_private(src_pixmap);
if (!radeon_glamor_prepare_access_cpu_ro(scrn, src_pixmap,
src_priv))
return ret;
}
ret = fbCopyArea(pSrcDrawable, pDstDrawable, pGC, srcx, srcy,
width, height, dstx, dsty);
if (src_pixmap != dst_pixmap)
radeon_glamor_finish_access_cpu(src_pixmap);
return ret;
}
static Bool
radeon_glamor_set_shared_pixmap_backing(PixmapPtr pixmap, void *handle)
{
ScreenPtr screen = pixmap->drawable.pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
struct radeon_surface surface;
struct radeon_pixmap *priv;
if (!radeon_set_shared_pixmap_backing(pixmap, handle, &surface))
return FALSE;
priv = radeon_get_pixmap_private(pixmap);
priv->surface = surface;
if (!radeon_glamor_create_textured_pixmap(pixmap, priv)) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"Failed to get PRIME drawable for glamor pixmap.\n");
return FALSE;
}
screen->ModifyPixmapHeader(pixmap,
pixmap->drawable.width,
pixmap->drawable.height,
0, 0, 0, NULL);
return TRUE;
}
static RegionPtr
radeon_glamor_copy_area(DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable,
GCPtr pGC, int srcx, int srcy, int width, int height,
int dstx, int dsty)
{
ScreenPtr screen = pDstDrawable->pScreen;
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
RADEONInfoPtr info = RADEONPTR(scrn);
PixmapPtr src_pixmap = get_drawable_pixmap(pSrcDrawable);
PixmapPtr dst_pixmap = get_drawable_pixmap(pDstDrawable);
struct radeon_pixmap *src_priv = radeon_get_pixmap_private(src_pixmap);
struct radeon_pixmap *dst_priv = radeon_get_pixmap_private(dst_pixmap);
RegionPtr ret = NULL;
if (info->accel_state->force || (src_priv && !src_priv->bo) ||
(dst_priv && !dst_priv->bo)) {
if (!radeon_glamor_prepare_access_gpu(dst_priv))
goto fallback;
if (src_priv != dst_priv &&
!radeon_glamor_prepare_access_gpu(src_priv))
goto fallback;
ret = info->glamor.SavedCopyArea(pSrcDrawable, pDstDrawable,
pGC, srcx, srcy,
width, height, dstx, dsty);
radeon_glamor_finish_access_gpu_rw(info, dst_priv);
if (src_priv != dst_priv)
radeon_glamor_finish_access_gpu_ro(info, src_priv);
return ret;
}
fallback:
if (radeon_glamor_prepare_access_cpu_rw(scrn, dst_pixmap, dst_priv)) {
if (pSrcDrawable == pDstDrawable ||
radeon_glamor_prepare_access_cpu_ro(scrn, src_pixmap,
src_priv)) {
ret = fbCopyArea(pSrcDrawable, pDstDrawable, pGC,
srcx, srcy, width, height, dstx, dsty);
if (pSrcDrawable != pDstDrawable)
radeon_glamor_finish_access_cpu(src_pixmap);
}
radeon_glamor_finish_access_cpu(dst_pixmap);
}
return ret;
}
/**
* radeon_glamor_validate_gc() sets the ops to our implementations, which may be
* accelerated or may sync the card and fall back to fb.
*/
static void
radeon_glamor_validate_gc(GCPtr pGC, unsigned long changes, DrawablePtr pDrawable)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pGC->pScreen);
RADEONInfoPtr info = RADEONPTR(scrn);
glamor_validate_gc(pGC, changes, pDrawable);
info->glamor.SavedCopyArea = pGC->ops->CopyArea;
if (radeon_get_pixmap_private(get_drawable_pixmap(pDrawable)) ||
(pGC->stipple && radeon_get_pixmap_private(pGC->stipple)) ||
(pGC->fillStyle == FillTiled &&
radeon_get_pixmap_private(pGC->tile.pixmap)))
pGC->ops = (GCOps *)&radeon_glamor_ops;
else
pGC->ops = &radeon_glamor_nodstbo_ops;
}
static Bool
radeon_glamor_share_pixmap_backing(PixmapPtr pixmap, ScreenPtr slave,
void **handle_p)
{
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (!priv)
return FALSE;
return radeon_share_pixmap_backing(priv->bo, handle_p);
}
static void
radeon_glamor_push_pixels(GCPtr pGC, PixmapPtr pBitmap,
DrawablePtr pDrawable, int w, int h, int x, int y)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
priv = radeon_get_pixmap_private(pBitmap);
if (radeon_glamor_prepare_access_cpu_ro(scrn, pBitmap, priv)) {
if (radeon_glamor_prepare_access_gc(scrn, pGC)) {
fbPushPixels(pGC, pBitmap, pDrawable, w, h, x,
y);
radeon_glamor_finish_access_gc(pGC);
}
radeon_glamor_finish_access_cpu(pBitmap);
}
radeon_glamor_finish_access_cpu(pixmap);
}
}
static Bool
radeon_glamor_prepare_access_gc(ScrnInfoPtr scrn, GCPtr pGC)
{
struct radeon_pixmap *priv;
if (pGC->stipple) {
priv = radeon_get_pixmap_private(pGC->stipple);
if (!radeon_glamor_prepare_access_cpu_ro(scrn, pGC->stipple, priv))
return FALSE;
}
if (pGC->fillStyle == FillTiled) {
priv = radeon_get_pixmap_private(pGC->tile.pixmap);
if (!radeon_glamor_prepare_access_cpu_ro(scrn, pGC->tile.pixmap,
priv)) {
if (pGC->stipple)
radeon_glamor_finish_access_cpu(pGC->stipple);
return FALSE;
}
}
return TRUE;
}
static RegionPtr
radeon_glamor_bitmap_to_region(PixmapPtr pPix)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pPix->drawable.pScreen);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pPix);
RegionPtr ret;
if (!radeon_glamor_prepare_access_cpu_ro(scrn, pPix, priv))
return NULL;
ret = fbPixmapToRegion(pPix);
radeon_glamor_finish_access_cpu(pPix);
return ret;
}
static void
radeon_glamor_poly_point(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt,
DDXPointPtr pptInit)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
fbPolyPoint(pDrawable, pGC, mode, npt, pptInit);
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_copy_window(WindowPtr pWin, DDXPointRec ptOldOrg,
RegionPtr prgnSrc)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pWin->drawable.pScreen);
PixmapPtr pixmap = get_drawable_pixmap(&pWin->drawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
fbCopyWindow(pWin, ptOldOrg, prgnSrc);
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_set_spans(DrawablePtr pDrawable, GCPtr pGC, char *psrc,
DDXPointPtr ppt, int *pwidth, int nspans, int fSorted)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
fbSetSpans(pDrawable, pGC, psrc, ppt, pwidth, nspans, fSorted);
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_get_spans(DrawablePtr pDrawable, int wMax, DDXPointPtr ppt,
int *pwidth, int nspans, char *pdstStart)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_ro(scrn, pixmap, priv)) {
fbGetSpans(pDrawable, wMax, ppt, pwidth, nspans, pdstStart);
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_get_image(DrawablePtr pDrawable, int x, int y, int w, int h,
unsigned int format, unsigned long planeMask, char *d)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_ro(scrn, pixmap, priv)) {
fbGetImage(pDrawable, x, y, w, h, format, planeMask, d);
radeon_glamor_finish_access_cpu(pixmap);
}
}
static RegionPtr
radeon_glamor_copy_plane(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC,
int srcx, int srcy, int w, int h, int dstx, int dsty,
unsigned long bitPlane)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDst->pScreen);
PixmapPtr dst_pix = get_drawable_pixmap(pDst);
struct radeon_pixmap *dst_priv = radeon_get_pixmap_private(dst_pix);
RegionPtr ret = NULL;
if (radeon_glamor_prepare_access_cpu_rw(scrn, dst_pix, dst_priv)) {
PixmapPtr src_pix = get_drawable_pixmap(pSrc);
struct radeon_pixmap *src_priv = radeon_get_pixmap_private(src_pix);
if (radeon_glamor_prepare_access_cpu_ro(scrn, src_pix, src_priv)) {
ret =
fbCopyPlane(pSrc, pDst, pGC, srcx, srcy, w, h, dstx,
dsty, bitPlane);
radeon_glamor_finish_access_cpu(src_pix);
}
radeon_glamor_finish_access_cpu(dst_pix);
}
return ret;
}
static void
radeon_glamor_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth,
int x, int y, int w, int h, int leftPad, int format,
char *bits)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
fbPutImage(pDrawable, pGC, depth, x, y, w, h, leftPad, format,
bits);
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_poly_fill_rect(DrawablePtr pDrawable, GCPtr pGC,
int nrect, xRectangle *prect)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
if (radeon_glamor_prepare_access_gc(scrn, pGC)) {
fbPolyFillRect(pDrawable, pGC, nrect, prect);
radeon_glamor_finish_access_gc(pGC);
}
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_poly_glyph_blt(DrawablePtr pDrawable, GCPtr pGC,
int x, int y, unsigned int nglyph,
CharInfoPtr *ppci, pointer pglyphBase)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
if (radeon_glamor_prepare_access_gc(scrn, pGC)) {
fbPolyGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci,
pglyphBase);
radeon_glamor_finish_access_gc(pGC);
}
radeon_glamor_finish_access_cpu(pixmap);
}
}
Bool
radeon_glamor_create_textured_pixmap(PixmapPtr pixmap)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
RADEONInfoPtr info = RADEONPTR(scrn);
struct radeon_pixmap *priv;
if ((info->use_glamor) == 0)
return TRUE;
priv = radeon_get_pixmap_private(pixmap);
if (!priv->stride)
priv->stride = pixmap->devKind;
if (glamor_egl_create_textured_pixmap(pixmap, priv->bo->handle,
priv->stride))
return TRUE;
else
return FALSE;
}
static void
radeon_glamor_poly_lines(DrawablePtr pDrawable, GCPtr pGC,
int mode, int npt, DDXPointPtr ppt)
{
if (pGC->lineWidth == 0) {
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
if (radeon_glamor_prepare_access_gc(scrn, pGC)) {
fbPolyLine(pDrawable, pGC, mode, npt, ppt);
radeon_glamor_finish_access_gc(pGC);
}
radeon_glamor_finish_access_cpu(pixmap);
}
return;
}
/* fb calls mi functions in the lineWidth != 0 case. */
fbPolyLine(pDrawable, pGC, mode, npt, ppt);
}
static void
radeon_glamor_poly_fill_rect(DrawablePtr pDrawable, GCPtr pGC,
int nrect, xRectangle *prect)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDrawable->pScreen);
RADEONInfoPtr info = RADEONPTR(scrn);
PixmapPtr pixmap = get_drawable_pixmap(pDrawable);
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
if ((info->accel_state->force || (priv && !priv->bo)) &&
radeon_glamor_prepare_access_gpu(priv)) {
info->glamor.SavedPolyFillRect(pDrawable, pGC, nrect, prect);
radeon_glamor_finish_access_gpu_rw(info, priv);
return;
}
if (radeon_glamor_prepare_access_cpu_rw(scrn, pixmap, priv)) {
if (radeon_glamor_prepare_access_gc(scrn, pGC)) {
fbPolyFillRect(pDrawable, pGC, nrect, prect);
radeon_glamor_finish_access_gc(pGC);
}
radeon_glamor_finish_access_cpu(pixmap);
}
}
static void
radeon_glamor_composite(CARD8 op,
PicturePtr pSrc,
PicturePtr pMask,
PicturePtr pDst,
INT16 xSrc, INT16 ySrc,
INT16 xMask, INT16 yMask,
INT16 xDst, INT16 yDst,
CARD16 width, CARD16 height)
{
ScrnInfoPtr scrn = xf86ScreenToScrn(pDst->pDrawable->pScreen);
RADEONInfoPtr info;
PixmapPtr pixmap;
struct radeon_pixmap *dst_priv, *src_priv = NULL, *mask_priv = NULL;
Bool gpu_done = FALSE;
if (pDst->alphaMap || pSrc->alphaMap || (pMask && pMask->alphaMap))
goto fallback;
pixmap = get_drawable_pixmap(pDst->pDrawable);
if (&pixmap->drawable != pDst->pDrawable ||
pixmap->usage_hint != RADEON_CREATE_PIXMAP_SCANOUT)
goto fallback;
dst_priv = radeon_get_pixmap_private(pixmap);
if (!radeon_glamor_prepare_access_gpu(dst_priv))
goto fallback;
info = RADEONPTR(scrn);
if (!pSrc->pDrawable ||
((pixmap = get_drawable_pixmap(pSrc->pDrawable)) &&
(src_priv = radeon_get_pixmap_private(pixmap)) &&
radeon_glamor_prepare_access_gpu(src_priv))) {
if (!pMask || !pMask->pDrawable ||
((pixmap = get_drawable_pixmap(pMask->pDrawable)) &&
(mask_priv = radeon_get_pixmap_private(pixmap)) &&
radeon_glamor_prepare_access_gpu(mask_priv))) {
info->glamor.SavedComposite(op, pSrc, pMask, pDst,
xSrc, ySrc, xMask, yMask,
xDst, yDst, width, height);
gpu_done = TRUE;
if (mask_priv)
radeon_glamor_finish_access_gpu_ro(info, mask_priv);
}
if (src_priv)
radeon_glamor_finish_access_gpu_ro(info, src_priv);
}
radeon_glamor_finish_access_gpu_rw(info, dst_priv);
if (gpu_done)
return;
fallback:
if (radeon_glamor_picture_prepare_access_cpu_rw(scrn, pDst)) {
if (radeon_glamor_picture_prepare_access_cpu_ro(scrn, pSrc)) {
if (!pMask ||
radeon_glamor_picture_prepare_access_cpu_ro(scrn, pMask)) {
fbComposite(op, pSrc, pMask, pDst,
xSrc, ySrc,
xMask, yMask,
xDst, yDst,
width, height);
if (pMask)
radeon_glamor_picture_finish_access_cpu(pMask);
}
radeon_glamor_picture_finish_access_cpu(pSrc);
}
radeon_glamor_picture_finish_access_cpu(pDst);
}
}
/* Get GEM handle for the pixmap */
Bool radeon_get_pixmap_handle(PixmapPtr pixmap, uint32_t *handle)
{
struct radeon_bo *bo = radeon_get_pixmap_bo(pixmap);
#ifdef USE_GLAMOR
ScreenPtr screen = pixmap->drawable.pScreen;
RADEONInfoPtr info = RADEONPTR(xf86ScreenToScrn(screen));
#endif
if (bo) {
*handle = bo->handle;
return TRUE;
}
#ifdef USE_GLAMOR
if (info->use_glamor) {
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
CARD16 stride;
CARD32 size;
int fd, r;
if (!priv) {
priv = calloc(1, sizeof(*priv));
radeon_set_pixmap_private(pixmap, priv);
}
if (priv->handle_valid) {
*handle = priv->handle;
return TRUE;
}
fd = glamor_fd_from_pixmap(screen, pixmap, &stride, &size);
if (fd < 0)
return FALSE;
r = drmPrimeFDToHandle(info->dri2.drm_fd, fd, &priv->handle);
close(fd);
if (r == 0) {
struct drm_radeon_gem_set_tiling args = { .handle = priv->handle };
priv->handle_valid = TRUE;
*handle = priv->handle;
if (drmCommandWriteRead(info->dri2.drm_fd,
DRM_RADEON_GEM_GET_TILING, &args,
sizeof(args)) == 0)
priv->tiling_flags = args.tiling_flags;
return TRUE;
}
}
#endif
return FALSE;
}
uint32_t radeon_get_pixmap_tiling_flags(PixmapPtr pPix)
{
#ifdef USE_GLAMOR
RADEONInfoPtr info = RADEONPTR(xf86ScreenToScrn(pPix->drawable.pScreen));
if (info->use_glamor) {
struct radeon_pixmap *priv = radeon_get_pixmap_private(pPix);
if (!priv || (!priv->bo && !priv->handle_valid)) {
uint32_t handle;
radeon_get_pixmap_handle(pPix, &handle);
priv = radeon_get_pixmap_private(pPix);
}
return priv ? priv->tiling_flags : 0;
} else
#endif
{
struct radeon_exa_pixmap_priv *driver_priv;
driver_priv = exaGetPixmapDriverPrivate(pPix);
return driver_priv ? driver_priv->tiling_flags : 0;
}
}
Bool radeon_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle,
struct radeon_surface *surface)
{
ScrnInfoPtr pScrn = xf86ScreenToScrn(ppix->drawable.pScreen);
RADEONInfoPtr info = RADEONPTR(pScrn);
struct radeon_bo *bo;
int ihandle = (int)(long)fd_handle;
uint32_t size = ppix->devKind * ppix->drawable.height;
bo = radeon_gem_bo_open_prime(info->bufmgr, ihandle, size);
if (!bo)
return FALSE;
memset(surface, 0, sizeof(struct radeon_surface));
radeon_set_pixmap_bo(ppix, bo);
if (info->ChipFamily >= CHIP_FAMILY_R600 && info->surf_man) {
uint32_t tiling_flags;
#ifdef USE_GLAMOR
if (info->use_glamor) {
tiling_flags = radeon_get_pixmap_private(ppix)->tiling_flags;
} else
#endif
{
struct radeon_exa_pixmap_priv *driver_priv;
driver_priv = exaGetPixmapDriverPrivate(ppix);
tiling_flags = driver_priv->tiling_flags;
}
surface->npix_x = ppix->drawable.width;
surface->npix_y = ppix->drawable.height;
surface->npix_z = 1;
surface->blk_w = 1;
surface->blk_h = 1;
surface->blk_d = 1;
surface->array_size = 1;
surface->bpe = ppix->drawable.bitsPerPixel / 8;
surface->nsamples = 1;
/* we are requiring a recent enough libdrm version */
surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
surface->flags |= RADEON_SURF_SET(RADEON_SURF_TYPE_2D, TYPE);
if (tiling_flags & RADEON_TILING_MACRO)
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
else if (tiling_flags & RADEON_TILING_MICRO)
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_1D, MODE);
else
surface->flags |= RADEON_SURF_SET(RADEON_SURF_MODE_LINEAR_ALIGNED, MODE);
surface->bankw = (tiling_flags >> RADEON_TILING_EG_BANKW_SHIFT) & RADEON_TILING_EG_BANKW_MASK;
surface->bankh = (tiling_flags >> RADEON_TILING_EG_BANKH_SHIFT) & RADEON_TILING_EG_BANKH_MASK;
surface->tile_split = eg_tile_split_opp((tiling_flags >> RADEON_TILING_EG_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_TILE_SPLIT_MASK);
surface->stencil_tile_split = (tiling_flags >> RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT) & RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK;
surface->mtilea = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK;
if (radeon_surface_best(info->surf_man, surface)) {
return FALSE;
}
if (radeon_surface_init(info->surf_man, surface)) {
return FALSE;
}
/* we have to post hack the surface to reflect the actual size
of the shared pixmap */
surface->level[0].pitch_bytes = ppix->devKind;
surface->level[0].nblk_x = ppix->devKind / surface->bpe;
}
Bool radeon_glamor_pixmap_is_offscreen(PixmapPtr pixmap)
{
struct radeon_pixmap *priv = radeon_get_pixmap_private(pixmap);
return priv && priv->bo;
}
