unsigned long long atf_sched_clock(void)
{
__u64 cval;
cval = (((read_cntpct_el0() - atf_time_base)*1000)/13) + normal_time_base;
return cval;
}
void generic_timer_backup(void)
{
__u64 cval;
cval = read_cntpct_el0();
__cpuxgpt_set_init_cnt((__u32)(cval >> 32), (__u32)(cval & 0xffffffff));
}
uint64_t sched_clock(void)
{
uint64_t cval;
cval = (((read_cntpct_el0() - atf_time_base)*1000)/
SYS_COUNTER_FREQ_IN_MHZ) + normal_time_base;
return cval;
}
void generic_timer_backup(void)
{
uint64_t cval;
cval = read_cntpct_el0();
cpuxgpt_set_init_cnt((uint32_t)(cval >> 32),
(uint32_t)(cval & 0xffffffff));
}
static uint64_t atf_sched_clock(void)
{
uint64_t cval;
cval = (((read_cntpct_el0() - atf_time_base) * 1000) / 13) +
normal_time_base;
return cval;
}
/*******************************************************************************
* Perform any BL3-1 early platform setup. Here is an opportunity to copy
* parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they
* are lost (potentially). This needs to be done before the MMU is initialized
* so that the memory layout can be used while creating page tables.
* BL2 has flushed this information to memory, so we are guaranteed to pick up
* good data.
******************************************************************************/
void bl31_early_platform_setup(bl31_params_t *from_bl2,
void *plat_params_from_bl2)
{
struct mtk_bl_param_t *pmtk_bl_param =
(struct mtk_bl_param_t *)from_bl2;
struct atf_arg_t *teearg;
unsigned long long normal_base;
unsigned long long atf_base;
assert(from_bl2 != NULL);
/*
* Mediatek preloader(i.e, BL2) is in 32 bit state, high 32bits
* of 64 bit GP registers are UNKNOWN if CPU warm reset from 32 bit
* to 64 bit state. So we need to clear high 32bit,
* which may be random value.
*/
pmtk_bl_param =
(struct mtk_bl_param_t *)((uint64_t)pmtk_bl_param & 0x00000000ffffffff);
plat_params_from_bl2 =
(void *)((uint64_t)plat_params_from_bl2 & 0x00000000ffffffff);
teearg = (struct atf_arg_t *)pmtk_bl_param->tee_info_addr;
console_init(teearg->atf_log_port, UART_CLOCK, UART_BAUDRATE);
memcpy((void *)>eearg, (void *)teearg, sizeof(struct atf_arg_t));
normal_base = 0;
/* in ATF boot time, timer for cntpct_el0 is not initialized
* so it will not count now.
*/
atf_base = read_cntpct_el0();
sched_clock_init(normal_base, atf_base);
VERBOSE("bl31_setup\n");
/* Populate entry point information for BL3-2 and BL3-3 */
SET_PARAM_HEAD(&bl32_image_ep_info,
PARAM_EP,
VERSION_1,
0);
SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
bl32_image_ep_info.pc = BL32_BASE;
SET_PARAM_HEAD(&bl33_image_ep_info,
PARAM_EP,
VERSION_1,
0);
/*
* Tell BL3-1 where the non-trusted software image
* is located and the entry state information
*/
/* BL33_START_ADDRESS */
bl33_image_ep_info.pc = pmtk_bl_param->bl33_start_addr;
bl33_image_ep_info.spsr = plat_get_spsr_for_bl33_entry();
bl33_image_ep_info.args.arg4 = pmtk_bl_param->bootarg_loc;
bl33_image_ep_info.args.arg5 = pmtk_bl_param->bootarg_size;
SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
}
u_register_t plat_get_stack_protector_canary(void)
{
/*
* Ideally, a random number should be returned instead of the
* combination of a timer's value and a compile-time constant.
* As the virt platform does not have any random number generator,
* this is better than nothing but not necessarily really secure.
*/
return RANDOM_CANARY_VALUE ^ read_cntpct_el0();
}
uint64_t ls_get_timer(uint64_t start)
{
return read_cntpct_el0() * 1000 / read_cntfrq_el0() - start;
}
void bl31_early_platform_setup(bl31_params_t *from_bl2,
void *plat_params_from_bl2)
{
unsigned long long normal_base;
unsigned long long atf_base;
config_L2_size();
atf_arg_t_ptr teearg = (atf_arg_t_ptr)(uintptr_t)TEE_BOOT_INFO_ADDR;
// overwrite core0 reset address, to avoid overwrite tee boot argument
mmio_write_32(MP0_MISC_CONFIG_BOOT_ADDR(0), (unsigned long)bl31_on_entrypoint);
normal_base = 0;
/* in ATF boot time, tiemr for cntpct_el0 is not initialized
* so it will not count now.
*/
atf_base = read_cntpct_el0();
atf_sched_clock_init(normal_base, atf_base);
/* Initialize the console to provide early debug support */
// console_init(UART0_BASE); // without boot argument
console_init(teearg->atf_log_port);
printf("LK boot argument location=0x%x\n\r", BOOT_ARGUMENT_LOCATION);
printf("KL boot argument size=0x%x\n\r", BOOT_ARGUMENT_SIZE);
printf("atf_magic=0x%x\n\r", teearg->atf_magic);
printf("tee_support=0x%x\n\r", teearg->tee_support);
printf("tee_entry=0x%x\n\r", teearg->tee_entry);
printf("tee_boot_arg_addr=0x%x\n\r", teearg->tee_boot_arg_addr);
printf("atf_log_port=0x%x\n\r", teearg->atf_log_port);
printf("atf_log_baudrate=0x%x\n\r", teearg->atf_log_baudrate);
printf("atf_log_buf_start=0x%x\n\r", teearg->atf_log_buf_start);
printf("atf_log_buf_size=0x%x\n\r", teearg->atf_log_buf_size);
printf("atf_aee_debug_buf_start=0x%x\n\r", teearg->atf_aee_debug_buf_start);
printf("atf_aee_debug_buf_size=0x%x\n\r", teearg->atf_aee_debug_buf_size);
printf("atf_irq_num=%d\n\r", teearg->atf_irq_num);
printf("BL33_START_ADDRESS=0x%x\n\r", BL33_START_ADDRESS);
/* Initialize the platform config for future decision making */
mt_config_setup();
printf("bl31_setup\n\r");
#if RESET_TO_BL31
/* There are no parameters from BL2 if BL31 is a reset vector */
assert(from_bl2 == NULL);
assert(plat_params_from_bl2 == NULL);
printf("RESET_TO_BL31\n\r");
/*
* Do initial security configuration to allow DRAM/device access. On
* Base MTK_platform only DRAM security is programmable (via TrustZone), but
* other platforms might have more programmable security devices
* present.
*/
//FIXME, do not set TZC400 now
//mt_security_setup();
#else
/* Check params passed from BL2 should not be NULL,
* We are not checking plat_params_from_bl2 as NULL as we are not
* using it on MTK_platform
*/
printf("not RESET_TO_BL31\n");
assert(from_bl2 != NULL);
assert(from_bl2->h.type == PARAM_BL31);
assert(from_bl2->h.version >= VERSION_1);
bl2_to_bl31_params = from_bl2;
assert(((unsigned long)plat_params_from_bl2) == MT_BL31_PLAT_PARAM_VAL);
#endif
/*If no TEE, initial devapc in ATF*/
if(! (teearg->tee_support))
start_devapc();
}
