/* invalid the TLBs for DDR and setup new ones to cover p_addr */ static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset) { u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE; unsigned long epn; u32 tsize, valid, ptr; phys_addr_t rpn = 0; int ddr_esel; ptr = vstart; while (ptr < (vstart + size)) { ddr_esel = find_tlb_idx((void *)ptr, 1); if (ddr_esel != -1) { read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn); disable_tlb(ddr_esel); } ptr += TSIZE_TO_BYTES(tsize); } /* Setup new tlb to cover the physical address */ setup_ddr_tlbs_phys(p_addr, size>>20); ptr = vstart; ddr_esel = find_tlb_idx((void *)ptr, 1); if (ddr_esel != -1) { read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, phys_offset); } else { printf("TLB error in function %s\n", __func__); return -1; } return 0; }
/* invalid TLBs for DDR and remap as normal after testing */ int arch_memory_test_cleanup(u32 *vstart, u32 *size, phys_addr_t *phys_offset) { unsigned long epn; u32 tsize, valid, ptr; phys_addr_t rpn = 0; int ddr_esel; /* disable the TLBs for this testing */ ptr = *vstart; while (ptr < (*vstart) + (*size)) { ddr_esel = find_tlb_idx((void *)ptr, 1); if (ddr_esel != -1) { read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn); disable_tlb(ddr_esel); } ptr += TSIZE_TO_BYTES(tsize); } puts("Remap DDR "); setup_ddr_tlbs(gd->ram_size>>20); puts("\n"); return 0; }
/* invalid the TLBs for DDR and setup new ones to cover p_addr */ static int reset_tlb(phys_addr_t p_addr, u32 size, phys_addr_t *phys_offset) { u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE; unsigned long epn; u32 tsize, valid, ptr; int ddr_esel; clear_ddr_tlbs_phys(p_addr, size>>20); /* Setup new tlb to cover the physical address */ setup_ddr_tlbs_phys(p_addr, size>>20); ptr = vstart; ddr_esel = find_tlb_idx((void *)ptr, 1); if (ddr_esel != -1) { read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, phys_offset); } else { printf("TLB error in function %s\n", __func__); return -1; } return 0; }