Example #1
0
int
kbd_init (struct naut_info * naut)
{
    printk("Initialize keyboard\n");
    register_irq_handler(1, kbd_handler, NULL);
    return 0;
}
Example #2
0
void sp804_enable()
{
    sp804_init();
    writel(0xE2, TIMER1_CONTROL(TIMER1_BASE));
    register_irq_handler(34, &sp804_handler);
    gic_configure_irq(34, IRQ_LEVEL_TRIGGERED);
    gic_enable_irq(34);
}
Example #3
0
File: e1000.c Project: scyphus/aos
struct e1000_device *
e1000_init_hw(struct pci_device *pcidev)
{
    struct e1000_device *dev;
    u16 m16;
    u32 m32;
    int i;

    dev = kmalloc(sizeof(struct e1000_device));

    /* Assert */
    if ( 0x8086 != pcidev->vendor_id ) {
        kfree(dev);
        return NULL;
    }

    /* Read MMIO */
    dev->mmio = pci_read_mmio(pcidev->bus, pcidev->slot, pcidev->func);
    if ( 0 == dev->mmio ) {
        kfree(dev);
        return NULL;
    }

    /* Initialize */
    mmio_write32(dev->mmio, E1000_REG_IMC, 0xffffffff);
    mmio_write32(dev->mmio, E1000_REG_CTRL,
                 mmio_read32(dev->mmio, E1000_REG_CTRL)
                 | E1000_CTRL_RST);
    arch_busy_usleep(100);
    mmio_write32(dev->mmio, E1000_REG_CTRL,
                 mmio_read32(dev->mmio, E1000_REG_CTRL)
                 | E1000_CTRL_SLU);
    mmio_write32(dev->mmio, E1000_REG_CTRL_EXT,
                 mmio_read32(dev->mmio, E1000_REG_CTRL_EXT)
                 & ~E1000_CTRL_EXT_LINK_MODE_MASK);
#if 0
    mmio_write32(dev->mmio, E1000_REG_TXDCTL,
                 E1000_TXDCTL_GRAN_DESC
                 | (128 << E1000_TXDCTL_HTHRESH_SHIFT)
                 | (8 << E1000_TXDCTL_PTHRESH_SHIFT));
#endif

    switch ( pcidev->device_id ) {
    case E1000_PRO1000MT:
    case E1000_82545EM:
        /* Read MAC address */
        m16 = e1000_eeprom_read_8254x(dev->mmio, 0);
        dev->macaddr[0] = m16 & 0xff;
        dev->macaddr[1] = (m16 >> 8) & 0xff;
        m16 = e1000_eeprom_read_8254x(dev->mmio, 1);
        dev->macaddr[2] = m16 & 0xff;
        dev->macaddr[3] = (m16 >> 8) & 0xff;
        m16 = e1000_eeprom_read_8254x(dev->mmio, 2);
        dev->macaddr[4] = m16 & 0xff;
        dev->macaddr[5] = (m16 >> 8) & 0xff;
        break;

    case E1000_82541PI:
    case E1000_82573L:
        /* Read MAC address */
        m16 = e1000_eeprom_read(dev->mmio, 0);
        dev->macaddr[0] = m16 & 0xff;
        dev->macaddr[1] = (m16 >> 8) & 0xff;
        m16 = e1000_eeprom_read(dev->mmio, 1);
        dev->macaddr[2] = m16 & 0xff;
        dev->macaddr[3] = (m16 >> 8) & 0xff;
        m16 = e1000_eeprom_read(dev->mmio, 2);
        dev->macaddr[4] = m16 & 0xff;
        dev->macaddr[5] = (m16 >> 8) & 0xff;
        break;

    case E1000_82567LM:
    case E1000_82577LM:
    case E1000_82579LM:
        /* Read MAC address */
        m32 = mmio_read32(dev->mmio, E1000_REG_RAL);
        dev->macaddr[0] = m32 & 0xff;
        dev->macaddr[1] = (m32 >> 8) & 0xff;
        dev->macaddr[2] = (m32 >> 16) & 0xff;
        dev->macaddr[3] = (m32 >> 24) & 0xff;
        m32 = mmio_read32(dev->mmio, E1000_REG_RAH);
        dev->macaddr[4] = m32 & 0xff;
        dev->macaddr[5] = (m32 >> 8) & 0xff;
        break;
    }

    /* Link up */
    mmio_write32(dev->mmio, E1000_REG_CTRL,
                 mmio_read32(dev->mmio, E1000_REG_CTRL)
                 | E1000_CTRL_SLU | E1000_CTRL_VME);

    /* Multicast array table */
    for ( i = 0; i < 128; i++ ) {
        mmio_write32(dev->mmio, E1000_REG_MTA + i * 4, 0);
    }

    /* Start TX/RX */
    e1000_setup_rx_desc(dev);
    e1000_setup_tx_desc(dev);

    /* Store the parent device information */
    dev->pci_device = pcidev;

    /* Enable interrupt (REG_IMS <- 0x1F6DC, then read REG_ICR ) */
    mmio_write32(dev->mmio, E1000_REG_IMS, 0x908e);
    (void)mmio_read32(dev->mmio, E1000_REG_ICR);
    /* Register IRQ handler */
    register_irq_handler((((pcidev->intr_pin -1) + pcidev->slot) % 4) + 0x10,
                         &e1000_irq_handler, dev);
#if 0
    kprintf("PCI: %x %x %x %x %x\r\n", pcidev->intr_pin, pcidev->intr_line,
            (((pcidev->intr_pin -1) + pcidev->slot) % 4) + 1,
            mmio_read32(dev->mmio, E1000_REG_IMS),
            mmio_read32(dev->mmio, E1000_REG_ICR));
#endif
    /* http://msdn.microsoft.com/en-us/library/windows/hardware/ff538017(v=vs.85).aspx */
    //mmio_write32(dev->mmio, E1000_REG_ICS, 0x908e);

    return dev;
}
Example #4
0
/*
 * Initialize the exception handlers. Exception handlers don't need to
 * call local_irq_done now as we didn't go that far.
 */
void init_irqs()
{
	int i;

	/* Initialize the IRQ chain */
	for (i = 0; i < 256; i++) {
		spinlock_init(&_irq_chains[i].lock, "irq-lock");
		_irq_chains[i].head = NULL;
	}
	
	/* Install the exception handlers */
	register_irq_handler(0, &_exceptn_hooks[0], divide_by_zero_fault);
	register_irq_handler(1, &_exceptn_hooks[1], single_step_fault);
	register_irq_handler(2, &_exceptn_hooks[2], nmi_trap);
	register_irq_handler(3, &_exceptn_hooks[3], breakpoint_trap);
	register_irq_handler(4, &_exceptn_hooks[4], overflow_trap);
	register_irq_handler(5, &_exceptn_hooks[5], bounds_check_fault);
	register_irq_handler(6, &_exceptn_hooks[6], invalid_opcode_fault);
	register_irq_handler(7, &_exceptn_hooks[7], no_device_fault);
	register_irq_handler(8, &_exceptn_hooks[8], double_fault_abort);
	register_irq_handler(10, &_exceptn_hooks[9], invalid_tss_fault);
	register_irq_handler(11, &_exceptn_hooks[10], no_segment_fault);
	register_irq_handler(12, &_exceptn_hooks[11], stack_fault);
	register_irq_handler(13, &_exceptn_hooks[12], general_protection_fault);
	register_irq_handler(16, &_exceptn_hooks[13], fpu_fault);
	register_irq_handler(17, &_exceptn_hooks[14], alignment_check_fault);
	register_irq_handler(18, &_exceptn_hooks[15], machine_check_abort);
	register_irq_handler(19, &_exceptn_hooks[16], simd_fpu_fault);

	/* Install the serial IRQ handler */
	register_irq_handler(IRQ4, &_kd_hook, kd_callback);

	kprintf("IRQ dispatch table initialized.\n");
}
/*!	\fn __attribute__((no_instrument_function)) void not_main(void)
 *	\brief The main, or not so main function. 
 * 
 * 	not_main is a thing i picked up from some example code online and haven't done anything with it since :S This is the entry point of the c program. 
 */
__attribute__((no_instrument_function)) void not_main(void)
{	
	/* board initialisation */
	uart_init();
	spi_pin_init();
	
	flag = 0;
	
	struct mpu60x0_stateType mpu60x0_state[NUM_FACES];
	for (int i=0; i<NUM_FACES; i++)
	{
		mpu60x0_state[i].gyro_rate = INV_MPU60x0_FSR_250DPS;
		mpu60x0_state[i].accel_rate = INV_MPU60x0_FS_02G;
		mpu60x0_state[i].filter_cutoff = INV_MPU60x0_FILTER_256HZ_NOLPF2;
	}
	
	int init_failed = 0;
	/* initialise all mpu 6000 boards */
	for (int i=0; i<NUM_FACES; i++)
	{
		if (!mpu60x0_init(shape_cs_mappings[i], &(mpu60x0_state[i])))
		{
			init_failed = 1;
			printf("MPUDev: %d failed\n", i);
		}
	}
	if (init_failed)
		return;
		
	//Configure SD Status LED for output
	gpio_function_select(16, GPIO_FUNC_OUTPUT);
	
	int mode = select_mode();
	printf("mode is: %d\n", mode);	
	
	/* interrupt pin config */
	gpio_set_interrupts();
	
	c_enable_irq();
	
	//assign function to handle gpio_irqs
	register_irq_handler ( GPIO_INT0, gpio_irq );
	register_irq_handler ( GPIO_INT1, gpio_irq );
	register_irq_handler ( GPIO_INT2, gpio_irq );
	register_irq_handler ( GPIO_INT3, gpio_irq );
	
	//enable irq handling on gpio interrupts
	enable_interrupt_for_irq(GPIO_INT0);
	enable_interrupt_for_irq(GPIO_INT1);
	enable_interrupt_for_irq(GPIO_INT2);
	enable_interrupt_for_irq(GPIO_INT3);
	
	flag = 0;
	
	unsigned int prevTs = 0;
	GPIO_OUTPUT_LEVEL prevLevel = GPIO_OUTPUT_HIGH;
	
	switch (mode)
	{
		case 0:
			main_readings(mpu60x0_state);
			return;
		case 1:
			static_calibration(mpu60x0_state);
			return;		
		case 2:
			main_debug(mpu60x0_state);
			return;
		default:
			printf("invalid mode\n");
			return;
	}
}
Example #6
0
void setup_time(void)
{
	i8254_set_frequency(HZ);
	register_irq_handler(I8254_IRQ, &i8254_interrupt_handler);
}
Example #7
0
File: ps2.cpp Project: mras0/attos
 explicit controller_impl() {
     reg_ = register_irq_handler(irq, [this]() { isr(); });
 }
Example #8
0
int floppy_init(void)
{
	int rc = 0;
	int res, i;
	struct vfs_node *n = NULL;
	//struct dev *d = NULL;
	//dev_t devno;
	u_long cmos_drive0, cmos_drive1;

	rc = dev_register(FLPY_MAJOR, "flpy");
	if (rc != 0) {
		DEBUG(DL_DBG, ("register FLPY device class failed.\n"));
		goto out;
	}

	/* Open the root of devfs */
	n = vfs_lookup("/dev", VFS_DIRECTORY);
	if (!n) {
		rc = EGENERIC;
		DEBUG(DL_DBG, ("devfs not mounted.\n"));
		goto out;
	}

	/* Setup the interrupt handler */
	register_irq_handler(IRQ6, &_flpy_hook, flpy_callback);

	/* Reset primary controller */
	_primary_fdc.base_port = FDC_PRI;
	fdc_reset(&_primary_fdc);
	
	/* Get the FDC version */
	fdc_out(_primary_fdc.base_port, FDC_VERSION);
	res = fdc_in(_primary_fdc.base_port);
	DEBUG(DL_DBG, ("FDC version(0x%x)\n", res));

	switch (res) {
	case 0x80: DEBUG(DL_DBG, ("NEC765 FDC found on base port 0x%x\n",
				  _primary_fdc.base_port));
		break;
	case 0x90: DEBUG(DL_DBG, ("Enhanced FDC found on base port 0x%x\n",
				  _primary_fdc.base_port));
		break;
	default: DEBUG(DL_DBG, ("FDC not found on base port 0x%x\n",
				_primary_fdc.base_port));
	}

	/* Read floppy drive type from CMOS memory (up to two drives). */
	fdc_out(0x70, 0x10);
	res = fdc_in(0x71);
	cmos_drive0 = res >> 4;
	cmos_drive1 = res & 0x0F;

	/* Setup the two floppy drives */
	setup_drive(&_primary_fdc, 0, cmos_drive0);
	setup_drive(&_primary_fdc, 0, cmos_drive1);

	for (res = 0, i = 0; i < NR_MAXDRIVES; i++) {
		if (_primary_fdc.drive[i].param->cmos_type)
			;	// Setup callback
	}

	DEBUG(DL_DBG, ("module flpy initialize successfully.\n"));

 out:
	if (n) {
		vfs_node_deref(n);
	}
	
	return 0;
}