static int stm32mp1_ddr_probe(struct udevice *dev)
{
struct ddr_info *priv = dev_get_priv(dev);
struct regmap *map;
int ret;
debug("STM32MP1 DDR probe\n");
priv->dev = dev;
ret = regmap_init_mem(dev_ofnode(dev), &map);
if (ret)
return ret;
priv->ctl = regmap_get_range(map, 0);
priv->phy = regmap_get_range(map, 1);
priv->rcc = STM32_RCC_BASE;
priv->info.base = STM32_DDR_BASE;
#if !defined(CONFIG_STM32MP1_TRUSTED) && \
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
priv->info.size = 0;
return stm32mp1_ddr_setup(dev);
#else
priv->info.size = dev_read_u32_default(dev, "st,mem-size", 0);
return 0;
#endif
}
int gdsys_rxaui_ctrl_probe(struct udevice *dev)
{
struct gdsys_rxaui_ctrl_priv *priv = dev_get_priv(dev);
regmap_init_mem(dev, &priv->map);
return 0;
}
static int syscon_pre_probe(struct udevice *dev)
{
struct syscon_uc_info *priv = dev_get_uclass_priv(dev);
/* Special case for PCI devices, which don't have a regmap */
if (device_get_uclass_id(dev->parent) == UCLASS_PCI)
return 0;
/*
* With OF_PLATDATA we really have no way of knowing the format of
* the device-specific platform data. So we assume that it starts with
* a 'reg' member, and this holds a single address and size. Drivers
* using OF_PLATDATA will need to ensure that this is true.
*/
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct syscon_base_platdata *plat = dev_get_platdata(dev);
return regmap_init_mem_platdata(dev, plat->reg, ARRAY_SIZE(plat->reg),
&priv->regmap);
#else
return regmap_init_mem(dev_ofnode(dev), &priv->regmap);
#endif
}
static int syscon_pre_probe(struct udevice *dev)
{
struct syscon_uc_info *priv = dev_get_uclass_priv(dev);
return regmap_init_mem(dev, &priv->regmap);
}
static int meson_reset_probe(struct udevice *dev)
{
struct meson_reset_priv *priv = dev_get_priv(dev);
return regmap_init_mem(dev, &priv->regmap);
}
