static int tegra_mmc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct tegra_mmc_priv *priv = dev_get_priv(dev); int bus_width, ret; priv->cfg.name = "Tegra SD/MMC"; priv->cfg.ops = &tegra_mmc_ops; bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "bus-width", 1); priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; priv->cfg.host_caps = 0; if (bus_width == 8) priv->cfg.host_caps |= MMC_MODE_8BIT; if (bus_width >= 4) priv->cfg.host_caps |= MMC_MODE_4BIT; priv->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; /* * min freq is for card identification, and is the highest * low-speed SDIO card frequency (actually 400KHz) * max freq is highest HS eMMC clock as per the SD/MMC spec * (actually 52MHz) */ priv->cfg.f_min = 375000; priv->cfg.f_max = 48000000; priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; priv->reg = (void *)dev_get_addr(dev); ret = reset_get_by_name(dev, "sdhci", &priv->reset_ctl); if (ret) { debug("reset_get_by_name() failed: %d\n", ret); return ret; } ret = clk_get_by_index(dev, 0, &priv->clk); if (ret) { debug("clk_get_by_index() failed: %d\n", ret); return ret; } ret = reset_assert(&priv->reset_ctl); if (ret) return ret; ret = clk_enable(&priv->clk); if (ret) return ret; ret = clk_set_rate(&priv->clk, 20000000); if (IS_ERR_VALUE(ret)) return ret; ret = reset_deassert(&priv->reset_ctl); if (ret) return ret; /* These GPIOs are optional */ gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); gpio_request_by_name(dev, "power-gpios", 0, &priv->pwr_gpio, GPIOD_IS_OUT); if (dm_gpio_is_valid(&priv->pwr_gpio)) dm_gpio_set_value(&priv->pwr_gpio, 1); priv->mmc = mmc_create(&priv->cfg, priv); if (priv->mmc == NULL) return -1; priv->mmc->dev = dev; upriv->mmc = priv->mmc; return 0; }
static int tegra_mmc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct tegra_mmc_plat *plat = dev_get_platdata(dev); struct tegra_mmc_priv *priv = dev_get_priv(dev); struct mmc_config *cfg = &plat->cfg; int bus_width, ret; cfg->name = dev->name; bus_width = dev_read_u32_default(dev, "bus-width", 1); cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; cfg->host_caps = 0; if (bus_width == 8) cfg->host_caps |= MMC_MODE_8BIT; if (bus_width >= 4) cfg->host_caps |= MMC_MODE_4BIT; cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; /* * min freq is for card identification, and is the highest * low-speed SDIO card frequency (actually 400KHz) * max freq is highest HS eMMC clock as per the SD/MMC spec * (actually 52MHz) */ cfg->f_min = 375000; cfg->f_max = 48000000; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; priv->reg = (void *)dev_read_addr(dev); ret = reset_get_by_name(dev, "sdhci", &priv->reset_ctl); if (ret) { debug("reset_get_by_name() failed: %d\n", ret); return ret; } ret = clk_get_by_index(dev, 0, &priv->clk); if (ret) { debug("clk_get_by_index() failed: %d\n", ret); return ret; } ret = reset_assert(&priv->reset_ctl); if (ret) return ret; ret = clk_enable(&priv->clk); if (ret) return ret; ret = clk_set_rate(&priv->clk, 20000000); if (IS_ERR_VALUE(ret)) return ret; ret = reset_deassert(&priv->reset_ctl); if (ret) return ret; /* These GPIOs are optional */ gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); gpio_request_by_name(dev, "power-gpios", 0, &priv->pwr_gpio, GPIOD_IS_OUT); if (dm_gpio_is_valid(&priv->pwr_gpio)) dm_gpio_set_value(&priv->pwr_gpio, 1); upriv->mmc = &plat->mmc; return tegra_mmc_init(dev); }
/** * Get the host address and peripheral ID for a node. * * @param blob fdt blob * @param node Device index (0-3) * @param host Structure to fill in (reg, width, mmc_id) */ static int mmc_get_config(const void *blob, int node, struct mmc_host *host, bool *removablep) { debug("%s: node = %d\n", __func__, node); host->enabled = fdtdec_get_is_enabled(blob, node); host->reg = (struct tegra_mmc *)fdtdec_get_addr(blob, node, "reg"); if ((fdt_addr_t)host->reg == FDT_ADDR_T_NONE) { debug("%s: no sdmmc base reg info found\n", __func__); return -FDT_ERR_NOTFOUND; } #ifdef CONFIG_TEGRA186 { /* * FIXME: This variable should go away when the MMC device * actually is a udevice. */ struct udevice dev; int ret; dev.of_offset = node; ret = reset_get_by_name(&dev, "sdhci", &host->reset_ctl); if (ret) { debug("reset_get_by_name() failed: %d\n", ret); return ret; } ret = clk_get_by_index(&dev, 0, &host->clk); if (ret) { debug("clk_get_by_index() failed: %d\n", ret); return ret; } } #else host->mmc_id = clock_decode_periph_id(blob, node); if (host->mmc_id == PERIPH_ID_NONE) { debug("%s: could not decode periph id\n", __func__); return -FDT_ERR_NOTFOUND; } #endif /* * NOTE: mmc->bus_width is determined by mmc.c dynamically. * TBD: Override it with this value? */ host->width = fdtdec_get_int(blob, node, "bus-width", 0); if (!host->width) debug("%s: no sdmmc width found\n", __func__); /* These GPIOs are optional */ gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio, GPIOD_IS_IN); gpio_request_by_name_nodev(blob, node, "wp-gpios", 0, &host->wp_gpio, GPIOD_IS_IN); gpio_request_by_name_nodev(blob, node, "power-gpios", 0, &host->pwr_gpio, GPIOD_IS_OUT); *removablep = !fdtdec_get_bool(blob, node, "non-removable"); debug("%s: found controller at %p, width = %d, periph_id = %d\n", __func__, host->reg, host->width, #ifndef CONFIG_TEGRA186 host->mmc_id #else -1 #endif ); return 0; }