static void riva_is_second(struct riva_par *par) { if (par->FlatPanel == 1) { switch(par->Chipset) { case NV_CHIP_GEFORCE4_440_GO: case NV_CHIP_GEFORCE4_440_GO_M64: case NV_CHIP_GEFORCE4_420_GO: case NV_CHIP_GEFORCE4_420_GO_M32: case NV_CHIP_QUADRO4_500_GOGL: par->SecondCRTC = TRUE; break; default: par->SecondCRTC = FALSE; break; } } else { if(riva_is_connected(par, 0)) { if(par->riva.PRAMDAC0[0x0000052C/4] & 0x100) par->SecondCRTC = TRUE; else par->SecondCRTC = FALSE; } else if (riva_is_connected(par, 1)) { if(par->riva.PRAMDAC0[0x0000252C/4] & 0x100) par->SecondCRTC = TRUE; else par->SecondCRTC = FALSE; } else /* default */ par->SecondCRTC = FALSE; } riva_override_CRTC(par); }
static void riva_is_second(struct riva_par *par) { if (par->FlatPanel == 1) { switch(par->Chipset & 0xffff) { case 0x0174: case 0x0175: case 0x0176: case 0x0177: case 0x0179: case 0x017C: case 0x017D: case 0x0186: case 0x0187: /* this might not be a good default for the chips below */ case 0x0286: case 0x028C: case 0x0316: case 0x0317: case 0x031A: case 0x031B: case 0x031C: case 0x031D: case 0x031E: case 0x031F: case 0x0324: case 0x0325: case 0x0328: case 0x0329: case 0x032C: case 0x032D: par->SecondCRTC = TRUE; break; default: par->SecondCRTC = FALSE; break; } } else { if(riva_is_connected(par, 0)) { if (NV_RD32(par->riva.PRAMDAC0, 0x0000052C) & 0x100) par->SecondCRTC = TRUE; else par->SecondCRTC = FALSE; } else if (riva_is_connected(par, 1)) { if(NV_RD32(par->riva.PRAMDAC0, 0x0000252C) & 0x100) par->SecondCRTC = TRUE; else par->SecondCRTC = FALSE; } else /* default */ par->SecondCRTC = FALSE; } riva_override_CRTC(par); }