//* ************************************************************************************************
/// @fn init_application(void)
/// @brief Init the watch's program
/// @return none
//* ************************************************************************************************
void init_application(void)
{
volatile unsigned char *ptr;
// ---------------------------------------------------------------------
// Enable watchdog
// Watchdog triggers after 16 seconds when not cleared
#ifdef USE_WATCHDOG
WDTCTL = WDTPW + WDTIS__512K + WDTSSEL__ACLK;
#else
WDTCTL = WDTPW + WDTHOLD;
#endif
// ---------------------------------------------------------------------
// Configure PMM
SetVCore(3);
// Set global high power request enable
PMMCTL0_H = 0xA5;
PMMCTL0_L |= PMMHPMRE;
PMMCTL0_H = 0x00;
// ---------------------------------------------------------------------
// Enable 32kHz ACLK
P5SEL |= 0x03; // Select XIN, XOUT on P5.0 and P5.1
UCSCTL6 &= ~XT1OFF; // XT1 On, Highest drive strength
UCSCTL6 |= XCAP_3; // Internal load cap
UCSCTL3 = SELA__XT1CLK; // Select XT1 as FLL reference
UCSCTL4 = SELA__XT1CLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV;
// ---------------------------------------------------------------------
// Configure CPU clock for 12MHz
_BIS_SR(SCG0); // Disable the FLL control loop
UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_5; // Select suitable range
UCSCTL2 = FLLD_1 + 0x16E; // Set DCO Multiplier
_BIC_SR(SCG0); // Enable the FLL control loop
// Worst-case settling time for the DCO when the DCO range bits have been
// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
// UG for optimization.
// 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle
#if __GNUC_MINOR__ > 5 || __GNUC_PATCHLEVEL__ > 8
__delay_cycles(250000);
#else
__delay_cycles(62500);
__delay_cycles(62500);
__delay_cycles(62500);
__delay_cycles(62500);
#endif
// Loop until XT1 & DCO stabilizes, use do-while to insure that
// body is executed at least once
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
SFRIFG1 &= ~OFIFG; // Clear fault flags
}
while ((SFRIFG1 & OFIFG));
// ---------------------------------------------------------------------
// Configure port mapping
// Disable all interrupts
__disable_interrupt();
// Get write-access to port mapping registers:
PMAPPWD = 0x02D52;
// Allow reconfiguration during runtime:
PMAPCTL = PMAPRECFG;
// P2.7 = TA0CCR1A or TA1CCR0A output (buzzer output)
ptr = &P2MAP0;
*(ptr + 7) = PM_TA1CCR0A;
P2OUT &= ~BIT7;
P2DIR |= BIT7;
// P1.5 = SPI MISO input
ptr = &P1MAP0;
*(ptr + 5) = PM_UCA0SOMI;
// P1.6 = SPI MOSI output
*(ptr + 6) = PM_UCA0SIMO;
// P1.7 = SPI CLK output
*(ptr + 7) = PM_UCA0CLK;
// Disable write-access to port mapping registers:
PMAPPWD = 0;
// Re-enable all interrupts
__enable_interrupt();
// Init the hardwre real time clock (RTC_A)
rtca_init();
// ---------------------------------------------------------------------
// Configure ports
// ---------------------------------------------------------------------
// Reset radio core
radio_reset();
radio_powerdown();
// ---------------------------------------------------------------------
// Init acceleration sensor
#ifdef CONFIG_MOD_ACCELEROMETER
as_init();
#else
as_disconnect();
#endif
// ---------------------------------------------------------------------
// Init LCD
lcd_init();
// ---------------------------------------------------------------------
// Init buttons
init_buttons();
// ---------------------------------------------------------------------
// Configure Timer0 for use by the clock and delay functions
timer0_init();
// Init buzzer
buzzer_init();
// ---------------------------------------------------------------------
// Init pressure sensor
#ifdef CONFIG_PRESSURE_SENSOR
ps_init();
#endif
// ---------------------------------------------------------------------
// Init other sensors
// From: "driver/battery"
battery_init();
// From: "drivers/temperature"
temperature_init();
/// @todo What is this ?
#ifdef CONFIG_INFOMEM
if (infomem_ready() == -2)
infomem_init(INFOMEM_C, INFOMEM_C + 2 * INFOMEM_SEGMENT_SIZE);
#endif
}
int main(void)
{
main_init();
rtca_init();
timer_a0_init();
uart0_init();
sim900_init_messagebus();
sim900.next_state = SIM900_OFF;
settings_init(SEGMENT_B, VERSION_BASED);
//settings_apply();
m.e = 0x0;
m.seg[0] = 0x0;
m.seg_num = 1;
stat.http_post_version = POST_VERSION;
stat.fix_id = 1;
sim900.imei[0] = 0;
sim900.flags = 0;
gps_trigger_next = 0;
gprs_trigger_next = s.gprs_loop_interval;
rtca_set_next = 0;
rtc_not_set = 1;
gps_next_state = MAIN_GPS_IDLE;
if (s.gps_invalidate_interval > s.gps_loop_interval) {
s.gps_invalidate_interval = s.gps_loop_interval;
}
gprs_tx_trig = 0;
gprs_tx_next = s.gprs_static_tx_interval;
gprs_blackout_lift = 0;
#ifdef DEBUG_GPS
uart1_init(9600);
uart1_tx_str("gps debug state\r\n", 17);
#endif
#ifdef DEBUG_GPRS
uart0_tx_str("gprs debug state\r\n", 18);
display_menu();
#endif
#ifdef CALIBRATION
sys_messagebus_register(&adc_calibration, SYS_MSG_RTC_SECOND);
#else
#ifndef DEBUG_GPRS
sys_messagebus_register(&schedule, SYS_MSG_RTC_SECOND);
sys_messagebus_register(&parse_gps, SYS_MSG_UART0_RX);
#else
sys_messagebus_register(&parse_UI, SYS_MSG_UART0_RX);
#endif
#ifndef DEBUG_GPS
sys_messagebus_register(&parse_gprs, SYS_MSG_UART1_RX);
#endif
#endif
#ifdef FM24_HAS_SLEEP_MODE
fm24_sleep();
#endif
// main loop
while (1) {
_BIS_SR(LPM3_bits + GIE);
//wake_up();
#ifdef USE_WATCHDOG
// reset watchdog counter
WDTCTL = (WDTCTL & 0xff) | WDTPW | WDTCNTCL;
#endif
// new messages can be sent from within a check_events() call, so
// parse the message linked list multiple times
check_events();
check_events();
check_events();
#ifdef FM24_HAS_SLEEP_MODE
// sleep
if (fm24_status & FM24_AWAKE) {
fm24_sleep();
}
#endif
// P4.0 and P4.1
//P4SEL &= ~0x3;
/*
PMMCTL0_H = 0xA5;
SVSMHCTL &= ~SVMHE;
SVSMLCTL &= ~(SVSLE+SVMLE);
PMMCTL0_H = 0x00;
*/
}
}
void init_application(void)
{
volatile unsigned char *ptr;
// ---------------------------------------------------------------------
// Enable watchdog
// Watchdog triggers after 16 seconds when not cleared
#ifdef USE_WATCHDOG
WDTCTL = WDTPW + WDTIS__512K + WDTSSEL__ACLK;
#else
WDTCTL = WDTPW + WDTHOLD;
#endif
// ---------------------------------------------------------------------
// Configure port mapping
// Disable all interrupts
__disable_interrupt();
// Get write-access to port mapping registers:
PMAPPWD = 0x02D52;
// Allow reconfiguration during runtime:
PMAPCTL = PMAPRECFG;
// P2.7 = TA0CCR1A or TA1CCR0A output (buzzer output)
ptr = &P2MAP0;
*(ptr + 7) = PM_TA1CCR0A;
P2OUT &= ~BIT7;
P2DIR |= BIT7;
// P1.5 = SPI MISO input
ptr = &P1MAP0;
*(ptr + 5) = PM_UCA0SOMI;
// P1.6 = SPI MOSI output
*(ptr + 6) = PM_UCA0SIMO;
// P1.7 = SPI CLK output
*(ptr + 7) = PM_UCA0CLK;
// Disable write-access to port mapping registers:
PMAPPWD = 0;
// Re-enable all interrupts
__enable_interrupt();
// Init the hardwre real time clock (RTC_A)
rtca_init();
// ---------------------------------------------------------------------
// Configure ports
// ---------------------------------------------------------------------
// Reset radio core
radio_reset();
radio_powerdown();
#ifdef CONFIG_ACCELEROMETER
// ---------------------------------------------------------------------
// Init acceleration sensor
as_init();
#else
as_disconnect();
#endif
// ---------------------------------------------------------------------
// Init buttons
init_buttons();
// ---------------------------------------------------------------------
// Configure Timer0 for use by the clock and delay functions
timer0_init();
/* Init buzzer */
buzzer_init();
// ---------------------------------------------------------------------
// Init pressure sensor
ps_init();
/* drivers/battery */
battery_init();
/* drivers/temperature */
temperature_init();
#ifdef CONFIG_INFOMEM
if (infomem_ready() == -2) {
infomem_init(INFOMEM_C, INFOMEM_C + 2 * INFOMEM_SEGMENT_SIZE);
}
#endif
}