static void __init smdkc110_machine_init(void) { struct clk *arm_clk; arm_clk = clk_get(NULL, "fclk"); if (arm_clk == NULL) { memcpy(&max8698_platform_default_data, &max8698_platform_data_1, sizeof(struct max8698_platform_data)); printk(KERN_ERR "get fclk clock failed\n"); } else { printk(KERN_INFO "arm_clk = %lu\n", arm_clk->rate); switch (arm_clk->rate) { case 800*1000*1000: memcpy(&max8698_platform_default_data, &max8698_platform_data_0, sizeof(struct max8698_platform_data)); break; case 1000*1000*1000: memcpy(&max8698_platform_default_data, &max8698_platform_data_1, sizeof(struct max8698_platform_data)); break; default: printk(KERN_ERR "Set to default voltage value\n"); memcpy(&max8698_platform_default_data, &max8698_platform_data_1, sizeof(struct max8698_platform_data)); break; } clk_put(arm_clk); } #ifdef CONFIG_DM9000 smdkv210_dm9000_set(); #endif s3c_pm_init(); s3c_i2c0_set_platdata(NULL); s3c_i2c1_set_platdata(NULL); s3c_i2c2_set_platdata(NULL); i2c_register_board_info(0, smdkc110_i2c_devs0, ARRAY_SIZE(smdkc110_i2c_devs0)); i2c_register_board_info(1, smdkc110_i2c_devs1, ARRAY_SIZE(smdkc110_i2c_devs1)); i2c_register_board_info(2, smdkc110_i2c_devs2, ARRAY_SIZE(smdkc110_i2c_devs2)); s3c_ide_set_platdata(&smdkc110_ide_pdata); #ifdef CONFIG_S3C64XX_DEV_SPI if (!gpio_request(S5PV210_GPB(1), "SPI_CS0")) { gpio_direction_output(S5PV210_GPB(1), 1); s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(1)); s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP); s5pv210_spi_set_info(0, S5PV210_SPI_SRCCLK_PCLK, ARRAY_SIZE(smdk_spi0_csi)); } if (!gpio_request(S5PV210_GPB(5), "SPI_CS1")) { gpio_direction_output(S5PV210_GPB(5), 1); s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(1)); s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP); s5pv210_spi_set_info(1, S5PV210_SPI_SRCCLK_PCLK, ARRAY_SIZE(smdk_spi1_csi)); } spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs)); #endif #ifdef CONFIG_S3C_DEV_HSMMC s3c_sdhci0_set_platdata(&smdkc110_hsmmc0_pdata); #endif #ifdef CONFIG_S3C_DEV_HSMMC1 s3c_sdhci1_set_platdata(&smdkc110_hsmmc1_pdata); #endif #ifdef CONFIG_S3C_DEV_HSMMC2 s3c_sdhci2_set_platdata(&smdkc110_hsmmc2_pdata); #endif #ifdef CONFIG_S3C_DEV_HSMMC3 s3c_sdhci3_set_platdata(&smdkc110_hsmmc3_pdata); #endif #ifdef CONFIG_S3C_DEV_HWMON s3c_hwmon_set_platdata(&smdkc110_hwmon_pdata); #endif #ifdef CONFIG_TOUCHSCREEN_S3C2410 #ifdef CONFIG_S3C_DEV_ADC s3c24xx_ts_set_platdata(&s3c_ts_platform); #endif #ifdef CONFIG_S3C_DEV_ADC1 s3c24xx_ts1_set_platdata(&s3c_ts_platform); #endif #endif #if defined(CONFIG_VIDEO_TV20) || defined(CONFIG_VIDEO_TVOUT) s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data); s5p_hdmi_cec_set_platdata(&hdmi_cec_data); #endif platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); }
void __init exynos5_universal5410_media_init(void) { #if defined (CONFIG_CSI_D) || defined (CONFIG_S5K6B2_CSI_D) s3c_i2c1_set_platdata(NULL); #endif #if defined (CONFIG_CSI_E) || defined (CONFIG_S5K6B2_CSI_E) s3c_i2c1_set_platdata(NULL); #endif #ifdef CONFIG_VIDEO_EXYNOS_MFC s5p_mfc_set_platdata(&universal5410_mfc_pd); dev_set_name(&s5p_device_mfc.dev, "s3c-mfc"); clk_add_alias("mfc", "s5p-mfc-v6", "mfc", &s5p_device_mfc.dev); s5p_mfc_setname(&s5p_device_mfc, "s5p-mfc-v6"); #endif platform_add_devices(universal5410_media_devices, ARRAY_SIZE(universal5410_media_devices)); s3c_set_platdata(&exynos5410_scaler_pd, sizeof(exynos5410_scaler_pd), &exynos5_device_scaler0); #ifdef CONFIG_VIDEO_S5K6B2 #if defined(CONFIG_S5K6B2_CSI_C) __set_mipi_csi_config(&s5p_mipi_csis0_default_data, s5k6b2.csi_data_align); #elif defined(CONFIG_S5K6B2_CSI_D) __set_mipi_csi_config(&s5p_mipi_csis1_default_data, s5k6b2.csi_data_align); #elif defined(CONFIG_S5K6B2_CSI_E) __set_mipi_csi_config(&s5p_mipi_csis2_default_data, s5k6b2.csi_data_align); #endif #endif #ifdef CONFIG_VIDEO_EXYNOS_MIPI_CSIS s3c_set_platdata(&s5p_mipi_csis0_default_data, sizeof(s5p_mipi_csis0_default_data), &s5p_device_mipi_csis0); s3c_set_platdata(&s5p_mipi_csis1_default_data, sizeof(s5p_mipi_csis1_default_data), &s5p_device_mipi_csis1); s3c_set_platdata(&s5p_mipi_csis2_default_data, sizeof(s5p_mipi_csis2_default_data), &s5p_device_mipi_csis2); #endif #ifdef CONFIG_VIDEO_EXYNOS_FIMC_LITE universal5410_camera_gpio_cfg(); universal5410_set_camera_platdata(); s3c_set_platdata(&exynos_flite0_default_data, sizeof(exynos_flite0_default_data), &exynos_device_flite0); s3c_set_platdata(&exynos_flite1_default_data, sizeof(exynos_flite1_default_data), &exynos_device_flite1); s3c_set_platdata(&exynos_flite2_default_data, sizeof(exynos_flite2_default_data), &exynos_device_flite2); #endif #if defined(CONFIG_VIDEO_EXYNOS_TV) dev_set_name(&s5p_device_hdmi.dev, "exynos5-hdmi"); mxr_platdata.ip_ver = IP_VER_TV_5A_1; hdmi_platdata.ip_ver = IP_VER_TV_5A_1; s5p_tv_setup(); /* Below should be enabled after power domain is available */ #if 0 s5p_device_hdmi.dev.parent = &exynos5_device_pd[PD_DISP1].dev; s5p_device_mixer.dev.parent = &exynos5_device_pd[PD_DISP1].dev; #endif #ifdef CONFIG_VIDEO_EXYNOS_HDMI_CEC s5p_hdmi_cec_set_platdata(&hdmi_cec_data); #endif s3c_set_platdata(&mxr_platdata, sizeof(mxr_platdata), &s5p_device_mixer); s5p_hdmi_set_platdata(&hdmi_platdata); /* * exynos5_hs_i2c2_set_platdata(NULL); * i2c_register_board_info(6, hs_i2c_devs2, ARRAY_SIZE(hs_i2c_devs2)); */ #endif #ifdef CONFIG_VIDEO_EXYNOS_GSCALER exynos5_gsc_set_ip_ver(IP_VER_GSC_5A); exynos5_gsc_set_pm_qos_val(160000, 160000); s3c_set_platdata(&exynos_gsc0_default_data, sizeof(exynos_gsc0_default_data), &exynos5_device_gsc0); s3c_set_platdata(&exynos_gsc1_default_data, sizeof(exynos_gsc1_default_data), &exynos5_device_gsc1); s3c_set_platdata(&exynos_gsc2_default_data, sizeof(exynos_gsc2_default_data), &exynos5_device_gsc2); s3c_set_platdata(&exynos_gsc3_default_data, sizeof(exynos_gsc3_default_data), &exynos5_device_gsc3); #endif #ifdef CONFIG_VIDEO_EXYNOS5_FIMC_IS dev_set_name(&exynos5_device_fimc_is.dev, "s5p-mipi-csis.0"); clk_add_alias("gscl_wrap0", FIMC_IS_MODULE_NAME, "gscl_wrap0", &exynos5_device_fimc_is.dev); dev_set_name(&exynos5_device_fimc_is.dev, "s5p-mipi-csis.1"); clk_add_alias("gscl_wrap1", FIMC_IS_MODULE_NAME, "gscl_wrap1", &exynos5_device_fimc_is.dev); dev_set_name(&exynos5_device_fimc_is.dev, "s5p-mipi-csis.2"); clk_add_alias("gscl_wrap2", FIMC_IS_MODULE_NAME, "gscl_wrap2", &exynos5_device_fimc_is.dev); dev_set_name(&exynos5_device_fimc_is.dev, FIMC_IS_MODULE_NAME); exynos5_fimc_is_data.gpio_info = &gpio_universal5410; exynos5_fimc_is_set_platdata(&exynos5_fimc_is_data); if (!exynos_spi_cfg_cs(spi3_csi[0].line, 3)) { s3c64xx_spi3_set_platdata(&s3c64xx_spi3_pdata, EXYNOS_SPI_SRCCLK_SCLK, ARRAY_SIZE(spi3_csi)); spi_register_board_info(spi3_board_info, ARRAY_SIZE(spi3_board_info)); } else { pr_err("%s: Error requesting gpio for SPI-CH1 CS\n", __func__); } #endif #ifdef CONFIG_VIDEO_EXYNOS_FIMG2D s5p_fimg2d_set_platdata(&fimg2d_data); #endif #ifdef CONFIG_VIDEO_EXYNOS_JPEG s3c_set_platdata(&exynos5_jpeg_pd, sizeof(exynos5_jpeg_pd), &s5p_device_jpeg); #endif #ifdef CONFIG_VIDEO_EXYNOS_JPEG_HX s3c_set_platdata(&exynos5_jpeg_hx_pd, sizeof(exynos5_jpeg_hx_pd), &exynos5_device_jpeg_hx); #endif }
static void __init smdk4210_machine_init(void) { c1_config_gpio_table(); c1_config_sleep_gpio_table(); s3c_pm_init(); s3c_gpio_cfgpin(GPIO_WLAN_EN, S3C_GPIO_OUTPUT); s3c_gpio_setpull(GPIO_WLAN_EN, S3C_GPIO_PULL_NONE); exynos4_pd_enable(&exynos4_device_pd[PD_MFC].dev); exynos4_pd_enable(&exynos4_device_pd[PD_G3D].dev); exynos4_pd_enable(&exynos4_device_pd[PD_LCD0].dev); exynos4_pd_enable(&exynos4_device_pd[PD_LCD1].dev); exynos4_pd_enable(&exynos4_device_pd[PD_CAM].dev); exynos4_pd_enable(&exynos4_device_pd[PD_TV].dev); /* SROMC Setup */ /* TODO: Move me to a separate function */ /*u32 tmp; tmp = __raw_readl(S5P_SROM_BW); tmp &= ~(0xffff); tmp |= (0x9999); __raw_writel(tmp, S5P_SROM_BW); __raw_writel(0xff1ffff1, S5P_SROM_BC1); tmp = __raw_readl(S5P_VA_GPIO + 0x120); tmp &= ~(0xffffff); tmp |= (0x221121); __raw_writel(tmp, (S5P_VA_GPIO + 0x120)); __raw_writel(0x22222222, (S5P_VA_GPIO + 0x180)); __raw_writel(0x22222222, (S5P_VA_GPIO + 0x1a0)); __raw_writel(0x22222222, (S5P_VA_GPIO + 0x1c0)); __raw_writel(0x22222222, (S5P_VA_GPIO + 0x1e0)); */ /* MMC Card init */ s3c_gpio_cfgpin(GPIO_MASSMEM_EN, S3C_GPIO_OUTPUT); gpio_set_value(GPIO_MASSMEM_EN, GPIO_MASSMEM_EN_LEVEL); /* 400 kHz for initialization of MMC Card */ __raw_writel((__raw_readl(S5P_CLKDIV_FSYS3) & 0xfffffff0) | 0x9, S5P_CLKDIV_FSYS3); __raw_writel((__raw_readl(S5P_CLKDIV_FSYS2) & 0xfff0fff0) | 0x80008, S5P_CLKDIV_FSYS2); __raw_writel((__raw_readl(S5P_CLKDIV_FSYS1) & 0xfff0fff0) | 0x90009, S5P_CLKDIV_FSYS1); /* PLATDATA init */ s3c_i2c0_set_platdata(NULL); /*i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0))*/ s3c_i2c1_set_platdata(NULL); /*i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));*/ smdk4210_init_tsp(); s3c_i2c3_set_platdata(&i2c3_data); i2c_register_board_info(3, i2c_devs3, ARRAY_SIZE(i2c_devs3)); /* TSP */ smdk4210_init_pmic(); s3c_i2c5_set_platdata(NULL); i2c_register_board_info(5, i2c_devs5, ARRAY_SIZE(i2c_devs5)); s3c_i2c6_set_platdata(NULL); //i2c_register_board_info(6, i2c_devs6, ARRAY_SIZE(i2c_devs6)); /*s3c_i2c7_set_platdata(NULL); TVOUT i2c_register_board_info(7, i2c_devs7, ARRAY_SIZE(i2c_devs7));*/ smdk4210_init_touchkey(); i2c_register_board_info(9, i2c_gpio_gauge_devs, ARRAY_SIZE(i2c_gpio_gauge_devs)); s3cfb_set_platdata(NULL); s3c_device_fb.dev.parent = &exynos4_device_pd[PD_LCD0].dev; s3c_sdhci2_set_platdata(&smdk4210_hsmmc2_pdata); s3c_sdhci0_set_platdata(&smdk4210_hsmmc0_pdata); s3c_sdhci3_set_platdata(&smdk4210_hsmmc3_pdata); s3c_mshci_set_platdata(&smdk4210_mshc_pdata); s5p_fimg2d_set_platdata(&fimg2d_data); s5p_device_fimg2d.dev.parent = &exynos4_device_pd[PD_LCD0].dev; /* fimc */ s3c_fimc0_set_platdata(&fimc_plat); s3c_fimc1_set_platdata(&fimc_plat); s3c_fimc2_set_platdata(&fimc_plat); #if 0 /* TVOUT - Will nebkat hax? */ s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data); s5p_hdmi_cec_set_platdata(&hdmi_cec_data); s5p_device_tvout.dev.parent = &exynos4_device_pd[PD_TV].dev; #endif smdk4210_otg_init(); smdk4210_ohci_init(); clk_xusbxti.rate = 24000000; smdk4210_init_battery_gauge(); smdk4210_ehci_init(); platform_add_devices(smdk4210_devices, ARRAY_SIZE(smdk4210_devices)); samsung_bl_set(&smdk4210_bl_gpio_info, &smdk4210_bl_data); /*smdk4210_bt_setup();*/ }