static void exynos5_set_usbhost_mode(unsigned int mode) { struct exynos5_sysreg *sysreg = (struct exynos5_sysreg *)samsung_get_base_sysreg(); /* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */ if (mode == USB20_PHY_CFG_HOST_LINK_EN) { setbits_le32(&sysreg->usb20phy_cfg, USB20_PHY_CFG_HOST_LINK_EN); } else { clrbits_le32(&sysreg->usb20phy_cfg, USB20_PHY_CFG_HOST_LINK_EN); } }
static void exynos5_set_system_display(void) { struct exynos5_sysreg *sysreg = (struct exynos5_sysreg *)samsung_get_base_sysreg(); unsigned int cfg = 0; /* * system register path set * 0: MIE/MDNIE * 1: FIMD Bypass */ cfg = readl(&sysreg->disp1blk_cfg); cfg |= (1 << 15); writel(cfg, &sysreg->disp1blk_cfg); }
void power_enable_usb_phy(void) { struct exynos5_sysreg *sysreg = samsung_get_base_sysreg(); struct exynos5_power *power = samsung_get_base_power(); unsigned int phy_cfg; /* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */ phy_cfg = readl(&sysreg->usb20_phy_cfg); if (phy_cfg & USB20_PHY_CFG_EN) { printk(BIOS_DEBUG, "USB 2.0 HOST link already selected\n"); } else { phy_cfg |= USB20_PHY_CFG_EN; writel(phy_cfg, &sysreg->usb20_phy_cfg); } /* Enabling USBHOST_PHY */ setbits_le32(&power->usb_host_phy_ctrl, POWER_USB_HOST_PHY_CTRL_EN); }