Example #1
0
static ssize_t store_abb_property(struct device *dev,
				     struct device_attribute *attr,
				     const char *buf, size_t count)
{
	struct device_attr_value *container = (struct device_attr_value*)(attr);
	int val;

	if(sscanf(buf, "%d", &val) != 1)
		return -EINVAL;

	switch (container->type) {
		case FREQUENCY:	
			sanitize_min_max(val, 0, FREQ_MAX);
			break;
		case VOLTAGE:
			val = volt_to_regval(val);
			sanitize_min_max(val, ABB_MODE_060V, ABB_MODE_160V);
			break;
		default:
			return -EINVAL;
	}

	container->value = val;

	return count;
}
Example #2
0
static void set_slice_voltage(enum exynos4x12_abb_member target,
				int target_freq, int voltage)
{
	struct abb_slice* slice;
	struct abb_slice* candidate = NULL;
	int slice_size, i, tmp_volt;

	slice = abb_slices[target];
	slice_size = abb_slice_size[target];

	tmp_volt = volt_to_regval(voltage);
	sanitize_min_max(tmp_volt, ABB_MODE_060V, ABB_MODE_160V);

	if (target_freq != FREQ_ALL) {
		for (i = 0; i < slice_size; i++) {
			if(target_freq > slice->freq.value) {
				slice++;
				continue;	
			}

			candidate = slice;
		}

		if (candidate == NULL)
			return;

		candidate->volt.value = tmp_volt;
	} else {
		for (i = 0; i < slice_size; i++)
			slice++->volt.value = tmp_volt;
	}
}
static ssize_t set_volt_table(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
{
	struct exynos_context *platform = (struct exynos_context *)pkbdev->platform_context;
	int max = gpu_dvfs_get_level(platform->gpu_max_clock);
	int min = gpu_dvfs_get_level(platform->gpu_min_clock);
	int i, tokens, rest, target;
	int t[min - max];
	unsigned long flags;

	if ((tokens = read_into((int*)&t, min-max, buf, count)) < 0)
		return -EINVAL;

	target = -1;
	if (tokens == 2) {
		for (i = max; i <= min; i++) {
			if (t[0] == platform->table[i].clock) {
				target = i;
				break;
			}
		}
	}

	spin_lock_irqsave(&platform->gpu_dvfs_spinlock, flags);

	if (tokens == 2 && target > -1) {
		if ((rest = t[1] % GPU_VOLT_STEP) != 0) 
			t[1] += GPU_VOLT_STEP - rest;
		
		sanitize_min_max(t[1], GPU_MIN_VOLT, GPU_MAX_VOLT);
		platform->table[target].voltage = t[1];
	} else {
		for (i = 0; i < tokens; i++) {
			if ((rest = t[i] % GPU_VOLT_STEP) != 0) 
				t[i] += GPU_VOLT_STEP - rest;
			
			sanitize_min_max(t[i], GPU_MIN_VOLT, GPU_MAX_VOLT);
			platform->table[i + max].voltage = t[i];
		}
	}

	ipa_update();
	spin_unlock_irqrestore(&platform->gpu_dvfs_spinlock, flags);

	return count;
}
static ssize_t set_volt_table(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
{
	struct kbase_device *kbdev;
	struct exynos_context *platform;
	int max = 0; /* max DVFS level (100MHz) */
	int min = 7; /* min DVFS level (677MHz) */
	int i, tokens, rest, target;
	int t[min - max];
	unsigned long flags;

	kbdev = dev_get_drvdata(dev);
	platform = (struct exynos_context *)kbdev->platform_context;

	if ((tokens = read_into((int*)&t, min-max, buf, count)) < 0)
		return -EINVAL;

	target = -1;
	if (tokens == 2) {
		for (i = max; i <= min; i++) {
			if (t[0] == platform->table[i].clock) {
				target = i;
				break;
			}
		}
	}

	spin_lock_irqsave(&platform->gpu_dvfs_spinlock, flags);

	if (tokens == 2 && target > -1) {
		sanitize_min_max(t[1], 600000, 1150000);
		if ((rest = t[1] % 6250) != 0) t[1] += 6250-rest;
		platform->table[target].voltage = t[1];
	} else {
		for (i = 0; i < tokens; i++) {
			if ((rest = t[1] % 6250) != 0) t[1] += 6250-rest;
			sanitize_min_max(t[i], 600000, 1150000);
			platform->table[i + max].voltage = t[i];
		}
	}

	ipa_update();
	spin_unlock_irqrestore(&platform->gpu_dvfs_spinlock, flags);

	return count;
}