static int __devinit sdhci_of_probe(struct of_device *ofdev, const struct of_device_id *match) { struct device_node *np = ofdev->node; struct sdhci_of_data *sdhci_of_data = match->data; struct sdhci_host *host; struct sdhci_of_host *of_host; const u32 *clk; int size; int ret; if (!of_device_is_available(np)) return -ENODEV; host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host)); if (!host) return -ENOMEM; of_host = sdhci_priv(host); dev_set_drvdata(&ofdev->dev, host); host->ioaddr = of_iomap(np, 0); if (!host->ioaddr) { ret = -ENOMEM; goto err_addr_map; } host->irq = irq_of_parse_and_map(np, 0); if (!host->irq) { ret = -EINVAL; goto err_no_irq; } host->hw_name = dev_name(&ofdev->dev); if (sdhci_of_data) { host->quirks = sdhci_of_data->quirks; host->ops = &sdhci_of_data->ops; } clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) of_host->clock = *clk; ret = sdhci_add_host(host); if (ret) goto err_add_host; return 0; err_add_host: irq_dispose_mapping(host->irq); err_no_irq: iounmap(host->ioaddr); err_addr_map: sdhci_free_host(host); return ret; }
static int sdhci_iproc_probe(struct platform_device *pdev) { const struct of_device_id *match; const struct sdhci_iproc_data *iproc_data; struct sdhci_host *host; struct sdhci_iproc_host *iproc_host; struct sdhci_pltfm_host *pltfm_host; int ret; match = of_match_device(sdhci_iproc_of_match, &pdev->dev); if (!match) return -EINVAL; iproc_data = match->data; host = sdhci_pltfm_init(pdev, iproc_data->pdata, sizeof(*iproc_host)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); iproc_host = sdhci_pltfm_priv(pltfm_host); iproc_host->data = iproc_data; mmc_of_parse(host->mmc); sdhci_get_of_property(pdev); host->mmc->caps |= iproc_host->data->mmc_caps; pltfm_host->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(pltfm_host->clk)) { ret = PTR_ERR(pltfm_host->clk); goto err; } ret = clk_prepare_enable(pltfm_host->clk); if (ret) { dev_err(&pdev->dev, "failed to enable host clk\n"); goto err; } if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) { host->caps = iproc_host->data->caps; host->caps1 = iproc_host->data->caps1; } ret = sdhci_add_host(host); if (ret) goto err_clk; return 0; err_clk: clk_disable_unprepare(pltfm_host->clk); err: sdhci_pltfm_free(pdev); return ret; }
static int __devinit sdhci_brcm_probe(struct platform_device *pdev) { struct sdhci_host *host; struct resource *mres, *ires; int mres_size; int err; mres = platform_get_resource(pdev, IORESOURCE_MEM, 0); ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!mres || !ires) { dev_err(&pdev->dev, "can't get resources\n"); return -EIO; } mres_size = mres->end - mres->start + 1; if (!request_mem_region(mres->start, mres_size, DRV_NAME)) { dev_err(&pdev->dev, "can't request memory\n"); return -EBUSY; } host = sdhci_alloc_host(&pdev->dev, 0); if (!host) { dev_err(&pdev->dev, "out of memory\n"); return -ENOMEM; } dev_set_drvdata(&pdev->dev, host); host->hw_name = DRV_NAME; host->ops = &sdhci_brcm_ops; host->flags = 0; #if defined(CONFIG_BCM7635) host->quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; #else host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; #endif host->irq = ires->start; host->ioaddr = ioremap(mres->start, mres_size); HIF_ACK_IRQ(SDIO); HIF_ENABLE_IRQ(SDIO); err = sdhci_add_host(host); if (err < 0) { dev_err(&pdev->dev, "can't register controller (error %d)\n", err); sdhci_free_host(host); return err; } return 0; }
static int sdhci_iproc_probe(struct platform_device *pdev) { const struct of_device_id *match; const struct sdhci_iproc_data *iproc_data; struct sdhci_host *host; struct sdhci_iproc_host *iproc_host; struct sdhci_pltfm_host *pltfm_host; int ret; match = of_match_device(sdhci_iproc_of_match, &pdev->dev); if (!match) return -EINVAL; iproc_data = match->data; host = sdhci_pltfm_init(pdev, iproc_data->pdata, sizeof(*iproc_host)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); iproc_host = sdhci_pltfm_priv(pltfm_host); iproc_host->data = iproc_data; mmc_of_parse(host->mmc); sdhci_get_of_property(pdev); /* Enable EMMC 1/8V DDR capable */ host->mmc->caps |= MMC_CAP_1_8V_DDR; pltfm_host->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(pltfm_host->clk)) { ret = PTR_ERR(pltfm_host->clk); goto err; } if (iproc_host->data->pdata->quirks & SDHCI_QUIRK_MISSING_CAPS) { host->caps = iproc_host->data->caps; host->caps1 = iproc_host->data->caps1; } return sdhci_add_host(host); err: sdhci_pltfm_free(pdev); return ret; }
int sdhci_pltfm_register(struct platform_device *pdev, struct sdhci_pltfm_data *pdata) { struct sdhci_host *host; int ret = 0; host = sdhci_pltfm_init(pdev, pdata); if (IS_ERR(host)) return PTR_ERR(host); sdhci_get_of_property(pdev); ret = sdhci_add_host(host); if (ret) sdhci_pltfm_free(pdev); return ret; }
static int __devinit sdhci_sprd_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct sdhci_host *host; struct resource *res; int ret, irq; #ifdef CONFIG_MMC_CARD_HOTPLUG int sd_detect_gpio; int detect_irq; #endif struct sprd_host_data *host_data; irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } if(pdev->id == 0) { sd_buffer_pre_alloc(); } host = sdhci_alloc_host(dev, sizeof(struct sprd_host_data)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } host_data = sdhci_priv(host); host_data->platdata = dev_get_platdata(dev); host_data->clk_enable = 0; BUG_ON(NULL == host_data->platdata); printk("sdio probe %s, vdd %s (%d), clk %s parent %s\n", host_data->platdata->hw_name, host_data->platdata->vdd_name, host_data->platdata->volt_level, host_data->platdata->clk_name, host_data->platdata->clk_parent); platform_set_drvdata(pdev, host); host->vmmc = NULL; host->vmmc_ext = NULL; host->ioaddr = (void __iomem *)res->start; printk("sdio: host->ioaddr:0x%x\n", (u32)host->ioaddr); host->hw_name = (host_data->platdata->hw_name)? host_data->platdata->hw_name:pdev->name; host->ops = &sdhci_sprd_ops; host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |\ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |\ SDHCI_QUIRK_BROKEN_CARD_DETECTION|\ SDHCI_QUIRK_INVERTED_WRITE_PROTECT; host->irq = irq; #ifdef CONFIG_MMC_CARD_HOTPLUG sd_detect_gpio = host_data->platdata->detect_gpio; if(sd_detect_gpio > 0){ pr_info("%s, sd_detect_gpio:%d\n", __func__, sd_detect_gpio); if (0 == pdev->id){ ret = gpio_request(sd_detect_gpio, "sdio0_detect"); }else{ ret = gpio_request(sd_detect_gpio, "sdio1_detect"); } if (ret) { dev_err(dev, "cannot request gpio\n"); return -1; } ret = gpio_direction_input(sd_detect_gpio); if (ret) { dev_err(dev, "gpio can not change to input\n"); return -1; } detect_irq = gpio_to_irq(sd_detect_gpio); if (detect_irq < 0){ dev_err(dev, "cannot alloc detect irq\n"); return -1; } host_data->detect_irq = detect_irq; }else if (host_data->platdata->register_status_notify) { host_data->platdata->register_status_notify(sdhci_status_notify_cb, host); } else if (!host_data->platdata->status) { printk("%s: No card detect facilities available\n", mmc_hostname(host->mmc)); }else{ printk("%s, sd_detect_gpio == 0 \n", __func__ ); } #endif if(host_data->platdata->vdd_name) { host->vmmc = regulator_get(NULL, host_data->platdata->vdd_name); BUG_ON(IS_ERR(host->vmmc)); if(!is_sd_slot(host)) regulator_enable(host->vmmc); } if(host_data->platdata->vdd_ext_name) { host->vmmc_ext = regulator_get(NULL, host_data->platdata->vdd_ext_name); BUG_ON(IS_ERR(host->vmmc_ext)); regulator_enable(host->vmmc_ext); } host->clk = NULL; sdhci_module_init(host); switch(pdev->id) { case 0: host->mmc->pm_flags |= MMC_PM_ONLY_USED_SDIO0_SHARK; host->caps = sdhci_readl(host, SDHCI_CAPABILITIES) & (~(SDHCI_CAN_VDD_330 | SDHCI_CAN_VDD_180)); host->quirks |= SDHCI_QUIRK_MISSING_CAPS; host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY; break; case 1: host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY|MMC_PM_KEEP_POWER |MMC_PM_DISABLE_TIMEOUT_IRQ; host->mmc->pm_caps |= MMC_PM_KEEP_POWER |MMC_PM_DISABLE_TIMEOUT_IRQ; #ifdef CONFIG_SDIO_CARD host->mmc->caps |= MMC_CAP_4_BIT_DATA |MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD; #else host->mmc->caps |= MMC_CAP_4_BIT_DATA |MMC_CAP_NONREMOVABLE; #endif break; case 2: host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY | MMC_PM_KEEP_POWER; host->mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD; break; case 3: host->caps = sdhci_readl(host, SDHCI_CAPABILITIES) & (~(SDHCI_CAN_VDD_330 | SDHCI_CAN_VDD_300)); host->quirks |= SDHCI_QUIRK_MISSING_CAPS; host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY | MMC_PM_KEEP_POWER; host->mmc->caps |= MMC_CAP_NONREMOVABLE | MMC_CAP_8_BIT_DATA | MMC_CAP_HW_RESET; break; default: BUG(); break; } #ifdef CONFIG_PM_RUNTIME switch(pdev->id) { case 1: case 2: #ifdef CONFIG_SDIO_CARD pm_runtime_set_active(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, 100); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_enable(&pdev->dev); pm_runtime_no_callbacks(mmc_classdev(host->mmc)); pm_suspend_ignore_children(mmc_classdev(host->mmc), true); pm_runtime_set_active(mmc_classdev(host->mmc)); pm_runtime_enable(mmc_classdev(host->mmc)); #endif break; case 3: case 0: pm_suspend_ignore_children(&pdev->dev, true); pm_runtime_set_active(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, 100); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_enable(&pdev->dev); default: break; } #endif ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } #ifdef CONFIG_MMC_BUS_SCAN if (pdev->id == 1) sdhci_host_g = host; #endif return 0; err_add_host: #ifdef CONFIG_PM_RUNTIME pm_runtime_disable(&(pdev)->dev); pm_runtime_set_suspended(&(pdev)->dev); #endif if (host_data->clk_enable) { clk_disable(host->clk); host_data->clk_enable = 0; } sdhci_free_host(host); return ret; }
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdata) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } sc = sdhci_priv(host); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; sc->ext_cd_gpio = -1; /* invalid gpio number */ platform_set_drvdata(pdev, host); sc->clk_io = clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_io_clk; } /* enable the local io clock and keep it running for the moment. */ clk_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char name[14]; snprintf(name, 14, "mmc_busclk.%d", ptr); clk = clk_get(dev, name); if (IS_ERR(clk)) { continue; } clks++; sc->clk_bus[ptr] = clk; /* * save current clock index to know which clock bus * is used later in overriding functions. */ sc->cur_clk = ptr; clk_enable(clk); dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } sc->ioarea = request_mem_region(res->start, resource_size(res), mmc_hostname(host->mmc)); if (!sc->ioarea) { dev_err(dev, "failed to reserve register area\n"); ret = -ENXIO; goto err_req_regs; } host->ioaddr = ioremap_nocache(res->start, resource_size(res)); if (!host->ioaddr) { dev_err(dev, "failed to map registers\n"); ret = -ENXIO; goto err_req_regs; } /* Ensure we have minimal gpio selected CMD/CLK/Detect */ if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, pdata->max_width); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; /* Setup quirks for the controller */ host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; #ifndef CONFIG_MMC_SDHCI_S3C_DMA /* we currently see overruns on errors, so disable the SDMA * support as well. */ host->quirks |= SDHCI_QUIRK_BROKEN_DMA; #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ /* It seems we do not get an DATA transfer complete on non-busy * transfers, not sure if this is a problem with this specific * SDHCI block, or a missing configuration that needs to be set. */ host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; /* This host supports the Auto CMD12 */ host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */ host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC; if (pdata->cd_type == S3C_SDHCI_CD_NONE || pdata->cd_type == S3C_SDHCI_CD_PERMANENT) host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) host->mmc->caps = MMC_CAP_NONREMOVABLE; if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; /* * If controller does not have internal clock divider, * we can use overriding functions instead of default. */ if (pdata->clk_type) { sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; } /* It supports additional host capabilities if needed */ if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } /* The following two methods of card detection might call sdhci_s3c_notify_change() immediately, so they can be called only after sdhci_add_host(). Setup errors are ignored. */ if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) pdata->ext_cd_init(&sdhci_s3c_notify_change); if (pdata->cd_type == S3C_SDHCI_CD_GPIO && gpio_is_valid(pdata->ext_cd_gpio)) sdhci_s3c_setup_card_detect_gpio(sc); return 0; err_add_host: release_resource(sc->ioarea); kfree(sc->ioarea); err_req_regs: for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { if (sc->clk_bus[ptr]) { clk_disable(sc->clk_bus[ptr]); clk_put(sc->clk_bus[ptr]); } } err_no_busclks: clk_disable(sc->clk_io); clk_put(sc->clk_io); err_io_clk: sdhci_free_host(host); return ret; }
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdata) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } sc = sdhci_priv(host); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; platform_set_drvdata(pdev, host); sc->clk_io = clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_io_clk; } /* enable the local io clock and keep it running for the moment. */ clk_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char *name = pdata->clocks[ptr]; if (name == NULL) continue; clk = clk_get(dev, name); if (IS_ERR(clk)) { dev_err(dev, "failed to get clock %s\n", name); continue; } clks++; sc->clk_bus[ptr] = clk; clk_enable(clk); dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } sc->ioarea = request_mem_region(res->start, resource_size(res), mmc_hostname(host->mmc)); if (!sc->ioarea) { dev_err(dev, "failed to reserve register area\n"); ret = -ENXIO; goto err_req_regs; } host->ioaddr = ioremap_nocache(res->start, resource_size(res)); if (!host->ioaddr) { dev_err(dev, "failed to map registers\n"); ret = -ENXIO; goto err_req_regs; } /* Ensure we have minimal gpio selected CMD/CLK/Detect */ if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, pdata->max_width); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; /* Setup quirks for the controller */ host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; #ifndef CONFIG_MMC_SDHCI_S3C_DMA /* we currently see overruns on errors, so disable the SDMA * support as well. */ host->quirks |= SDHCI_QUIRK_BROKEN_DMA; #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ /* It seems we do not get an DATA transfer complete on non-busy * transfers, not sure if this is a problem with this specific * SDHCI block, or a missing configuration that needs to be set. */ host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } return 0; err_add_host: release_resource(sc->ioarea); kfree(sc->ioarea); err_req_regs: for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { clk_disable(sc->clk_bus[ptr]); clk_put(sc->clk_bus[ptr]); } err_no_busclks: clk_disable(sc->clk_io); clk_put(sc->clk_io); err_io_clk: sdhci_free_host(host); return ret; }
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdata) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } sc = sdhci_priv(host); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; sc->ext_cd_gpio = -1; /* invalid gpio number */ platform_set_drvdata(pdev, host); sc->clk_io = clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_io_clk; } /* enable the local io clock and keep it running for the moment. */ clk_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char *name = pdata->clocks[ptr]; if (name == NULL) continue; clk = clk_get(dev, name); if (IS_ERR(clk)) { dev_err(dev, "failed to get clock %s\n", name); continue; } clks++; sc->clk_bus[ptr] = clk; /* * save current clock index to know which clock bus * is used later in overriding functions. */ sc->cur_clk = ptr; clk_enable(clk); dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } sc->ioarea = request_mem_region(res->start, resource_size(res), mmc_hostname(host->mmc)); if (!sc->ioarea) { dev_err(dev, "failed to reserve register area\n"); ret = -ENXIO; goto err_req_regs; } host->ioaddr = ioremap_nocache(res->start, resource_size(res)); if (!host->ioaddr) { dev_err(dev, "failed to map registers\n"); ret = -ENXIO; goto err_req_regs; } /* Ensure we have minimal gpio selected CMD/CLK/Detect */ if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, pdata->max_width); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; /* Setup quirks for the controller */ host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; #ifndef CONFIG_MMC_SDHCI_S3C_DMA /* we currently see overruns on errors, so disable the SDMA * support as well. */ host->quirks |= SDHCI_QUIRK_BROKEN_DMA; #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ /* It seems we do not get an DATA transfer complete on non-busy * transfers, not sure if this is a problem with this specific * SDHCI block, or a missing configuration that needs to be set. */ host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; /* This host supports the Auto CMD12 */ host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; if (pdata->cd_type == S3C_SDHCI_CD_NONE) host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) host->mmc->caps = MMC_CAP_NONREMOVABLE; if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; /* if vmmc_name is in pdata */ if (pdata->vmmc_name) host->vmmc_name = pdata->vmmc_name; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; /* * If controller does not have internal clock divider, * we can use overriding functions instead of default. */ if (pdata->clk_type) { sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; } /* It supports additional host capabilities if needed */ if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; /* for BCM WIFI */ if (pdata->pm_flags) host->mmc->pm_flags |= pdata->pm_flags; #ifdef CONFIG_MACH_MIDAS_01_BD /* before calling shhci_add_host, you should turn vdd_tflash on */ sdhci_s3c_vtf_on_off(1); #endif /* To turn on vmmc regulator only if sd card exists, GPIO pin for card detection should be initialized. Moved from sdhci_s3c_setup_card_detect_gpio() function */ if (pdata->cd_type == S3C_SDHCI_CD_GPIO && gpio_is_valid(pdata->ext_cd_gpio)) { if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) { sc->ext_cd_gpio = pdata->ext_cd_gpio; sc->ext_cd_gpio_invert = pdata->ext_cd_gpio_invert; mmc_host_sd_set_present(host->mmc); if (sd_detection_cmd_dev == NULL && sc->ext_cd_gpio) { sd_detection_cmd_dev = device_create(sec_class, NULL, 0, NULL, "sdcard"); if (IS_ERR(sd_detection_cmd_dev)) pr_err("Fail to create sysfs dev\n"); if (device_create_file(sd_detection_cmd_dev, &dev_attr_status) < 0) pr_err("Fail to create sysfs file\n"); dev_set_drvdata(sd_detection_cmd_dev, sc); } #ifdef CONFIG_MIDAS_COMMON /* set TF_EN gpio as OUTPUT */ gpio_request(GPIO_TF_EN, "TF_EN"); gpio_direction_output(GPIO_TF_EN, 1); s3c_gpio_cfgpin(GPIO_TF_EN, S3C_GPIO_SFN(1)); s3c_gpio_setpull(GPIO_TF_EN, S3C_GPIO_PULL_NONE); #endif } else { dev_err(dev, "cannot request gpio for card detect\n"); } } #ifdef CONFIG_MACH_PX /* * sdhc which has S3C_SDHCI_CD_EXTERNAL flag means a wifi * on PX projects. */ if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL) { /* w/a for h/w sdio interrupt */ host->quirks |= SDHCI_QUIRK_RESET_AFTER_REQUEST; } #endif ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } /* if it is set SDHCI_QUIRK_BROKEN_CARD_DETECTION before calling sdhci_add_host, in sdhci_add_host, MMC_CAP_NEEDS_POLL flag will be set. The flag S3C_SDHCI_CD_PERMANENT dose not need to detect a card by polling. */ if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT || \ pdata->cd_type == S3C_SDHCI_CD_GPIO) host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; /* The following two methods of card detection might call sdhci_s3c_notify_change() immediately, so they can be called only after sdhci_add_host(). Setup errors are ignored. */ if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) { pdata->ext_cd_init(&sdhci_s3c_notify_change); #ifdef CONFIG_MACH_PX if (pdata->ext_pdev) pdata->ext_pdev(pdev); #endif } #ifdef CONFIG_MACH_U1_NA_SPR if (pdata->cd_type == S3C_SDHCI_CD_GPIO && pdata->ext_cd_init) pdata->ext_cd_init(&sdhci_s3c_notify_change); #endif if (pdata->cd_type == S3C_SDHCI_CD_GPIO && gpio_is_valid(pdata->ext_cd_gpio)) sdhci_s3c_setup_card_detect_gpio(sc); #ifdef CONFIG_MACH_MIDAS_01_BD /* if card dose not exist, it should turn vtf off */ if (pdata->cd_type == S3C_SDHCI_CD_GPIO && sdhci_s3c_get_card_exist(host)) sdhci_s3c_vtf_on_off(1); else sdhci_s3c_vtf_on_off(0); #endif return 0; err_add_host: release_resource(sc->ioarea); kfree(sc->ioarea); err_req_regs: for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { clk_disable(sc->clk_bus[ptr]); clk_put(sc->clk_bus[ptr]); } err_no_busclks: clk_disable(sc->clk_io); clk_put(sc->clk_io); err_io_clk: sdhci_free_host(host); return ret; }
static int __devinit sdhci_pxav2_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host = NULL; struct sdhci_pxa *pxa = NULL; const struct of_device_id *match; int ret; struct clk *clk; pxa = kzalloc(sizeof(struct sdhci_pxa), GFP_KERNEL); if (!pxa) return -ENOMEM; host = sdhci_pltfm_init(pdev, NULL); if (IS_ERR(host)) { kfree(pxa); return PTR_ERR(host); } pltfm_host = sdhci_priv(host); pltfm_host->priv = pxa; clk = clk_get(dev, "PXA-SDHCLK"); if (IS_ERR(clk)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(clk); goto err_clk_get; } pltfm_host->clk = clk; clk_enable(clk); host->quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; match = of_match_device(of_match_ptr(sdhci_pxav2_of_match), &pdev->dev); if (match) { pdata = pxav2_get_mmc_pdata(dev); } if (pdata) { if (pdata->flags & PXA_FLAG_CARD_PERMANENT) { /* on-chip device */ host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; host->mmc->caps |= MMC_CAP_NONREMOVABLE; } /* If slot design supports 8 bit data, indicate this to MMC. */ if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT) host->mmc->caps |= MMC_CAP_8_BIT_DATA; if (pdata->quirks) host->quirks |= pdata->quirks; if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; if (pdata->pm_caps) host->mmc->pm_caps |= pdata->pm_caps; } host->ops = &pxav2_sdhci_ops; ret = sdhci_add_host(host); if (ret) { dev_err(&pdev->dev, "failed to add host\n"); goto err_add_host; } platform_set_drvdata(pdev, host); return 0; err_add_host: clk_disable(clk); clk_put(clk); err_clk_get: sdhci_pltfm_free(pdev); kfree(pxa); return ret; }
static int sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata; struct sdhci_s3c_drv_data *drv_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdev->dev.platform_data && !pdev->dev.of_node) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } sc = sdhci_priv(host); pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); if (!pdata) { ret = -ENOMEM; goto err_pdata_io_clk; } if (pdev->dev.of_node) { ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata); if (ret) goto err_pdata_io_clk; } else { memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata)); sc->ext_cd_gpio = -1; /* invalid gpio number */ } drv_data = sdhci_s3c_get_driver_data(pdev); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; platform_set_drvdata(pdev, host); sc->clk_io = devm_clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_pdata_io_clk; } /* enable the local io clock and keep it running for the moment. */ clk_prepare_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char name[14]; snprintf(name, 14, "mmc_busclk.%d", ptr); clk = devm_clk_get(dev, name); if (IS_ERR(clk)) continue; clks++; sc->clk_bus[ptr] = clk; /* * save current clock index to know which clock bus * is used later in overriding functions. */ sc->cur_clk = ptr; dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } #ifndef CONFIG_PM_RUNTIME clk_prepare_enable(sc->clk_bus[sc->cur_clk]); #endif res = platform_get_resource(pdev, IORESOURCE_MEM, 0); host->ioaddr = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(host->ioaddr)) { ret = PTR_ERR(host->ioaddr); goto err_req_regs; } /* Ensure we have minimal gpio selected CMD/CLK/Detect */ if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, pdata->max_width); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; /* Setup quirks for the controller */ host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; if (drv_data) host->quirks |= drv_data->sdhci_quirks; #ifndef CONFIG_MMC_SDHCI_S3C_DMA /* we currently see overruns on errors, so disable the SDMA * support as well. */ host->quirks |= SDHCI_QUIRK_BROKEN_DMA; #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ /* It seems we do not get an DATA transfer complete on non-busy * transfers, not sure if this is a problem with this specific * SDHCI block, or a missing configuration that needs to be set. */ host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; /* This host supports the Auto CMD12 */ host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */ host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC; if (pdata->cd_type == S3C_SDHCI_CD_NONE || pdata->cd_type == S3C_SDHCI_CD_PERMANENT) host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) host->mmc->caps = MMC_CAP_NONREMOVABLE; switch (pdata->max_width) { case 8: host->mmc->caps |= MMC_CAP_8_BIT_DATA; case 4: host->mmc->caps |= MMC_CAP_4_BIT_DATA; break; } if (pdata->pm_caps) host->mmc->pm_caps |= pdata->pm_caps; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; /* * If controller does not have internal clock divider, * we can use overriding functions instead of default. */ if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) { pax_open_kernel(); *(void **)&sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; *(void **)&sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; *(void **)&sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; pax_close_kernel(); } /* It supports additional host capabilities if needed */ if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; if (pdata->host_caps2) host->mmc->caps2 |= pdata->host_caps2; pm_runtime_enable(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, 50); pm_runtime_use_autosuspend(&pdev->dev); pm_suspend_ignore_children(&pdev->dev, 1); ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); pm_runtime_forbid(&pdev->dev); pm_runtime_get_noresume(&pdev->dev); goto err_req_regs; } /* The following two methods of card detection might call sdhci_s3c_notify_change() immediately, so they can be called only after sdhci_add_host(). Setup errors are ignored. */ if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) pdata->ext_cd_init(&sdhci_s3c_notify_change); if (pdata->cd_type == S3C_SDHCI_CD_GPIO && gpio_is_valid(pdata->ext_cd_gpio)) sdhci_s3c_setup_card_detect_gpio(sc); #ifdef CONFIG_PM_RUNTIME if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) clk_disable_unprepare(sc->clk_io); #endif return 0; err_req_regs: #ifndef CONFIG_PM_RUNTIME clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); #endif err_no_busclks: clk_disable_unprepare(sc->clk_io); err_pdata_io_clk: sdhci_free_host(host); return ret; }
static int sdhci_bcm_kona_probe(struct platform_device *pdev) { struct sdhci_bcm_kona_dev *kona_dev = NULL; struct sdhci_pltfm_host *pltfm_priv; struct device *dev = &pdev->dev; struct sdhci_host *host; int ret; ret = 0; host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona, sizeof(*kona_dev)); if (IS_ERR(host)) return PTR_ERR(host); dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr); pltfm_priv = sdhci_priv(host); kona_dev = sdhci_pltfm_priv(pltfm_priv); mutex_init(&kona_dev->write_lock); mmc_of_parse(host->mmc); if (!host->mmc->f_max) { dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n"); ret = -ENXIO; goto err_pltfm_free; } /* Get and enable the external clock */ kona_dev->external_clk = devm_clk_get(dev, NULL); if (IS_ERR(kona_dev->external_clk)) { dev_err(dev, "Failed to get external clock\n"); ret = PTR_ERR(kona_dev->external_clk); goto err_pltfm_free; } if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) { dev_err(dev, "Failed to set rate external clock\n"); goto err_pltfm_free; } if (clk_prepare_enable(kona_dev->external_clk) != 0) { dev_err(dev, "Failed to enable external clock\n"); goto err_pltfm_free; } dev_dbg(dev, "non-removable=%c\n", (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N'); dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n", (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N', (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N'); if (host->mmc->caps & MMC_CAP_NONREMOVABLE) host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; dev_dbg(dev, "is_8bit=%c\n", (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N'); ret = sdhci_bcm_kona_sd_reset(host); if (ret) goto err_clk_disable; sdhci_bcm_kona_sd_init(host); ret = sdhci_add_host(host); if (ret) { dev_err(dev, "Failed sdhci_add_host\n"); goto err_reset; } /* if device is eMMC, emulate card insert right here */ if (host->mmc->caps & MMC_CAP_NONREMOVABLE) { ret = sdhci_bcm_kona_sd_card_emulate(host, 1); if (ret) { dev_err(dev, "unable to emulate card insertion\n"); goto err_remove_host; } } /* * Since the card detection GPIO interrupt is configured to be * edge sensitive, check the initial GPIO value here, emulate * only if the card is present */ if (mmc_gpio_get_cd(host->mmc) > 0) sdhci_bcm_kona_sd_card_emulate(host, 1); dev_dbg(dev, "initialized properly\n"); return 0; err_remove_host: sdhci_remove_host(host, 0); err_reset: sdhci_bcm_kona_sd_reset(host); err_clk_disable: clk_disable_unprepare(kona_dev->external_clk); err_pltfm_free: sdhci_pltfm_free(pdev); dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret); return ret; }
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdata) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } sc = sdhci_priv(host); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; platform_set_drvdata(pdev, host); sc->clk_io = clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_io_clk; } clk_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char *name = pdata->clocks[ptr]; if (name == NULL) continue; clk = clk_get(dev, name); if (IS_ERR(clk)) { dev_err(dev, "failed to get clock %s\n", name); continue; } clks++; sc->clk_bus[ptr] = clk; clk_enable(clk); dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } sc->ioarea = request_mem_region(res->start, resource_size(res), mmc_hostname(host->mmc)); if (!sc->ioarea) { dev_err(dev, "failed to reserve register area\n"); ret = -ENXIO; goto err_req_regs; } host->ioaddr = ioremap_nocache(res->start, resource_size(res)); if (!host->ioaddr) { dev_err(dev, "failed to map registers\n"); ret = -ENXIO; goto err_req_regs; } if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, pdata->max_width); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; host->quirks |= SDHCI_QUIRK_32BIT_ADMA_SIZE; #ifndef CONFIG_MMC_SDHCI_S3C_DMA host->quirks |= SDHCI_QUIRK_BROKEN_DMA; host->quirks |= SDHCI_QUIRK_NO_MULTIBLOCK; #endif host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } return 0; err_add_host: release_resource(sc->ioarea); kfree(sc->ioarea); err_req_regs: for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { clk_disable(sc->clk_bus[ptr]); clk_put(sc->clk_bus[ptr]); } err_no_busclks: clk_disable(sc->clk_io); clk_put(sc->clk_io); err_io_clk: sdhci_free_host(host); return ret; }
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdata) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } pdata->sdhci_host = host; sc = sdhci_priv(host); platform_set_drvdata(pdev, host); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; sc->clk_io = clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_io_clk; } /* enable the local io clock and keep it running for the moment. */ clk_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char *name = pdata->clocks[ptr]; if (name == NULL) continue; clk = clk_get(dev, name); if (IS_ERR(clk)) { dev_err(dev, "failed to get clock %s\n", name); continue; } clks++; sc->clk_bus[ptr] = clk; clk_enable(clk); dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } sc->ioarea = request_mem_region(res->start, resource_size(res), mmc_hostname(host->mmc)); if (!sc->ioarea) { dev_err(dev, "failed to reserve register area\n"); ret = -ENXIO; goto err_req_regs; } host->ioaddr = ioremap_nocache(res->start, resource_size(res)); if (!host->ioaddr) { dev_err(dev, "failed to map registers\n"); ret = -ENXIO; goto err_req_regs; } /* Ensure we have minimal gpio selected CMD/CLK/Detect */ if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, 0); sdhci_s3c_check_sclk(host); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; /* Setup quirks for the controller */ host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; host->flags = SDHCI_USE_DMA; /* It seems we do not get an DATA transfer complete on non-busy * transfers, not sure if this is a problem with this specific * SDHCI block, or a missing configuration that needs to be set. */ host->quirks |= SDHCI_QUIRK_NO_TCIRQ_ON_NOT_BUSY; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; if (pdata->host_caps) host->mmc->caps = pdata->host_caps; else host->mmc->caps = 0; /* to add external irq as a card detect signal */ if (pdata->cfg_ext_cd) { pdata->cfg_ext_cd(); if (pdata->detect_ext_cd()) host->flags |= SDHCI_DEVICE_ALIVE; } ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } /* register external irq here (after all init is done) */ if (pdata->cfg_ext_cd) { ret = request_irq(pdata->ext_cd, sdhci_irq_cd, IRQF_SHARED, mmc_hostname(host->mmc), sc); if(ret) goto err_add_host; } return 0; err_add_host: release_resource(sc->ioarea); kfree(sc->ioarea); err_req_regs: for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { clk_disable(sc->clk_bus[ptr]); clk_put(sc->clk_bus[ptr]); } err_no_busclks: clk_disable(sc->clk_io); clk_put(sc->clk_io); err_io_clk: sdhci_free_host(host); return ret; }
static int __devinit sdhci_tegra_probe(struct platform_device *pdev) { const struct of_device_id *match; const struct sdhci_tegra_soc_data *soc_data; struct sdhci_host *host; struct sdhci_pltfm_host *pltfm_host; struct tegra_sdhci_platform_data *plat; struct sdhci_tegra *tegra_host; struct clk *clk; int rc; match = of_match_device(sdhci_tegra_dt_match, &pdev->dev); if (match) soc_data = match->data; else soc_data = &soc_data_tegra20; host = sdhci_pltfm_init(pdev, soc_data->pdata); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); plat = pdev->dev.platform_data; if (plat == NULL) plat = sdhci_tegra_dt_parse_pdata(pdev); if (plat == NULL) { dev_err(mmc_dev(host->mmc), "missing platform data\n"); rc = -ENXIO; goto err_no_plat; } tegra_host = devm_kzalloc(&pdev->dev, sizeof(*tegra_host), GFP_KERNEL); if (!tegra_host) { dev_err(mmc_dev(host->mmc), "failed to allocate tegra_host\n"); rc = -ENOMEM; goto err_no_plat; } tegra_host->plat = plat; tegra_host->soc_data = soc_data; pltfm_host->priv = tegra_host; if (gpio_is_valid(plat->power_gpio)) { rc = gpio_request(plat->power_gpio, "sdhci_power"); if (rc) { dev_err(mmc_dev(host->mmc), "failed to allocate power gpio\n"); goto err_power_req; } tegra_gpio_enable(plat->power_gpio); gpio_direction_output(plat->power_gpio, 1); } if (gpio_is_valid(plat->cd_gpio)) { rc = gpio_request(plat->cd_gpio, "sdhci_cd"); if (rc) { dev_err(mmc_dev(host->mmc), "failed to allocate cd gpio\n"); goto err_cd_req; } tegra_gpio_enable(plat->cd_gpio); gpio_direction_input(plat->cd_gpio); rc = request_irq(gpio_to_irq(plat->cd_gpio), carddetect_irq, IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, mmc_hostname(host->mmc), host); if (rc) { dev_err(mmc_dev(host->mmc), "request irq error\n"); goto err_cd_irq_req; } } if (gpio_is_valid(plat->wp_gpio)) { rc = gpio_request(plat->wp_gpio, "sdhci_wp"); if (rc) { dev_err(mmc_dev(host->mmc), "failed to allocate wp gpio\n"); goto err_wp_req; } tegra_gpio_enable(plat->wp_gpio); gpio_direction_input(plat->wp_gpio); } clk = clk_get(mmc_dev(host->mmc), NULL); if (IS_ERR(clk)) { dev_err(mmc_dev(host->mmc), "clk err\n"); rc = PTR_ERR(clk); goto err_clk_get; } clk_enable(clk); pltfm_host->clk = clk; host->mmc->pm_caps = plat->pm_flags; if (plat->is_8bit) host->mmc->caps |= MMC_CAP_8_BIT_DATA; rc = sdhci_add_host(host); if (rc) goto err_add_host; return 0; err_add_host: clk_disable(pltfm_host->clk); clk_put(pltfm_host->clk); err_clk_get: if (gpio_is_valid(plat->wp_gpio)) { tegra_gpio_disable(plat->wp_gpio); gpio_free(plat->wp_gpio); } err_wp_req: if (gpio_is_valid(plat->cd_gpio)) free_irq(gpio_to_irq(plat->cd_gpio), host); err_cd_irq_req: if (gpio_is_valid(plat->cd_gpio)) { tegra_gpio_disable(plat->cd_gpio); gpio_free(plat->cd_gpio); } err_cd_req: if (gpio_is_valid(plat->power_gpio)) { tegra_gpio_disable(plat->power_gpio); gpio_free(plat->power_gpio); } err_power_req: err_no_plat: sdhci_pltfm_free(pdev); return rc; }
static int sdhci_pxav3_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct device_node *np = pdev->dev.of_node; struct sdhci_host *host = NULL; struct sdhci_pxa *pxa = NULL; const struct of_device_id *match; int ret; host = sdhci_pltfm_init(pdev, &sdhci_pxav3_pdata, sizeof(*pxa)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); pxa = sdhci_pltfm_priv(pltfm_host); pxa->clk_io = devm_clk_get(dev, "io"); if (IS_ERR(pxa->clk_io)) pxa->clk_io = devm_clk_get(dev, NULL); if (IS_ERR(pxa->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(pxa->clk_io); goto err_clk_get; } pltfm_host->clk = pxa->clk_io; clk_prepare_enable(pxa->clk_io); pxa->clk_core = devm_clk_get(dev, "core"); if (!IS_ERR(pxa->clk_core)) clk_prepare_enable(pxa->clk_core); /* enable 1/8V DDR capable */ host->mmc->caps |= MMC_CAP_1_8V_DDR; if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) { ret = armada_38x_quirks(pdev, host); if (ret < 0) goto err_mbus_win; ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info()); if (ret < 0) goto err_mbus_win; } match = of_match_device(of_match_ptr(sdhci_pxav3_of_match), &pdev->dev); if (match) { ret = mmc_of_parse(host->mmc); if (ret) goto err_of_parse; sdhci_get_of_property(pdev); pdata = pxav3_get_mmc_pdata(dev); pdev->dev.platform_data = pdata; } else if (pdata) { /* on-chip device */ if (pdata->flags & PXA_FLAG_CARD_PERMANENT) host->mmc->caps |= MMC_CAP_NONREMOVABLE; /* If slot design supports 8 bit data, indicate this to MMC. */ if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT) host->mmc->caps |= MMC_CAP_8_BIT_DATA; if (pdata->quirks) host->quirks |= pdata->quirks; if (pdata->quirks2) host->quirks2 |= pdata->quirks2; if (pdata->host_caps) host->mmc->caps |= pdata->host_caps; if (pdata->host_caps2) host->mmc->caps2 |= pdata->host_caps2; if (pdata->pm_caps) host->mmc->pm_caps |= pdata->pm_caps; if (gpio_is_valid(pdata->ext_cd_gpio)) { ret = mmc_gpio_request_cd(host->mmc, pdata->ext_cd_gpio, 0); if (ret) { dev_err(mmc_dev(host->mmc), "failed to allocate card detect gpio\n"); goto err_cd_req; } } } pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, PXAV3_RPM_DELAY_MS); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_enable(&pdev->dev); pm_suspend_ignore_children(&pdev->dev, 1); ret = sdhci_add_host(host); if (ret) { dev_err(&pdev->dev, "failed to add host\n"); goto err_add_host; } platform_set_drvdata(pdev, host); if (host->mmc->pm_caps & MMC_PM_WAKE_SDIO_IRQ) device_init_wakeup(&pdev->dev, 1); pm_runtime_put_autosuspend(&pdev->dev); return 0; err_add_host: pm_runtime_disable(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); err_of_parse: err_cd_req: err_mbus_win: clk_disable_unprepare(pxa->clk_io); clk_disable_unprepare(pxa->clk_core); err_clk_get: sdhci_pltfm_free(pdev); return ret; }
static int sdhci_msm_probe(struct platform_device *pdev) { struct sdhci_host *host; struct sdhci_pltfm_host *pltfm_host; struct sdhci_msm_host *msm_host; struct resource *core_memres; int ret; u16 host_version, core_minor; u32 core_version, config; u8 core_major; host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); msm_host = sdhci_pltfm_priv(pltfm_host); msm_host->mmc = host->mmc; msm_host->pdev = pdev; ret = mmc_of_parse(host->mmc); if (ret) goto pltfm_free; sdhci_get_of_property(pdev); msm_host->saved_tuning_phase = INVALID_TUNING_PHASE; /* Setup SDCC bus voter clock. */ msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus"); if (!IS_ERR(msm_host->bus_clk)) { /* Vote for max. clk rate for max. performance */ ret = clk_set_rate(msm_host->bus_clk, INT_MAX); if (ret) goto pltfm_free; ret = clk_prepare_enable(msm_host->bus_clk); if (ret) goto pltfm_free; } /* Setup main peripheral bus clock */ msm_host->pclk = devm_clk_get(&pdev->dev, "iface"); if (IS_ERR(msm_host->pclk)) { ret = PTR_ERR(msm_host->pclk); dev_err(&pdev->dev, "Peripheral clk setup failed (%d)\n", ret); goto bus_clk_disable; } ret = clk_prepare_enable(msm_host->pclk); if (ret) goto bus_clk_disable; /* Setup SDC MMC clock */ msm_host->clk = devm_clk_get(&pdev->dev, "core"); if (IS_ERR(msm_host->clk)) { ret = PTR_ERR(msm_host->clk); dev_err(&pdev->dev, "SDC MMC clk setup failed (%d)\n", ret); goto pclk_disable; } /* * xo clock is needed for FLL feature of cm_dll. * In case if xo clock is not mentioned in DT, warn and proceed. */ msm_host->xo_clk = devm_clk_get(&pdev->dev, "xo"); if (IS_ERR(msm_host->xo_clk)) { ret = PTR_ERR(msm_host->xo_clk); dev_warn(&pdev->dev, "TCXO clk not present (%d)\n", ret); } /* Vote for maximum clock rate for maximum performance */ ret = clk_set_rate(msm_host->clk, INT_MAX); if (ret) dev_warn(&pdev->dev, "core clock boost failed\n"); ret = clk_prepare_enable(msm_host->clk); if (ret) goto pclk_disable; core_memres = platform_get_resource(pdev, IORESOURCE_MEM, 1); msm_host->core_mem = devm_ioremap_resource(&pdev->dev, core_memres); if (IS_ERR(msm_host->core_mem)) { dev_err(&pdev->dev, "Failed to remap registers\n"); ret = PTR_ERR(msm_host->core_mem); goto clk_disable; } config = readl_relaxed(msm_host->core_mem + CORE_POWER); config |= CORE_SW_RST; writel_relaxed(config, msm_host->core_mem + CORE_POWER); /* SW reset can take upto 10HCLK + 15MCLK cycles. (min 40us) */ usleep_range(1000, 5000); if (readl(msm_host->core_mem + CORE_POWER) & CORE_SW_RST) { dev_err(&pdev->dev, "Stuck in reset\n"); ret = -ETIMEDOUT; goto clk_disable; } /* Set HC_MODE_EN bit in HC_MODE register */ writel_relaxed(HC_MODE_EN, (msm_host->core_mem + CORE_HC_MODE)); config = readl_relaxed(msm_host->core_mem + CORE_HC_MODE); config |= FF_CLK_SW_RST_DIS; writel_relaxed(config, msm_host->core_mem + CORE_HC_MODE); host_version = readw_relaxed((host->ioaddr + SDHCI_HOST_VERSION)); dev_dbg(&pdev->dev, "Host Version: 0x%x Vendor Version 0x%x\n", host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT)); core_version = readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION); core_major = (core_version & CORE_VERSION_MAJOR_MASK) >> CORE_VERSION_MAJOR_SHIFT; core_minor = core_version & CORE_VERSION_MINOR_MASK; dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n", core_version, core_major, core_minor); if (core_major == 1 && core_minor >= 0x42) msm_host->use_14lpp_dll_reset = true; /* * SDCC 5 controller with major version 1, minor version 0x34 and later * with HS 400 mode support will use CM DLL instead of CDC LP 533 DLL. */ if (core_major == 1 && core_minor < 0x34) msm_host->use_cdclp533 = true; /* * Support for some capabilities is not advertised by newer * controller versions and must be explicitly enabled. */ if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) { config = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES); config |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT; writel_relaxed(config, host->ioaddr + CORE_VENDOR_SPEC_CAPABILITIES0); } /* Setup IRQ for handling power/voltage tasks with PMIC */ msm_host->pwr_irq = platform_get_irq_byname(pdev, "pwr_irq"); if (msm_host->pwr_irq < 0) { dev_err(&pdev->dev, "Get pwr_irq failed (%d)\n", msm_host->pwr_irq); ret = msm_host->pwr_irq; goto clk_disable; } ret = devm_request_threaded_irq(&pdev->dev, msm_host->pwr_irq, NULL, sdhci_msm_pwr_irq, IRQF_ONESHOT, dev_name(&pdev->dev), host); if (ret) { dev_err(&pdev->dev, "Request IRQ failed (%d)\n", ret); goto clk_disable; } pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, MSM_MMC_AUTOSUSPEND_DELAY_MS); pm_runtime_use_autosuspend(&pdev->dev); ret = sdhci_add_host(host); if (ret) goto pm_runtime_disable; pm_runtime_mark_last_busy(&pdev->dev); pm_runtime_put_autosuspend(&pdev->dev); return 0; pm_runtime_disable: pm_runtime_disable(&pdev->dev); pm_runtime_set_suspended(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); clk_disable: clk_disable_unprepare(msm_host->clk); pclk_disable: clk_disable_unprepare(msm_host->pclk); bus_clk_disable: if (!IS_ERR(msm_host->bus_clk)) clk_disable_unprepare(msm_host->bus_clk); pltfm_free: sdhci_pltfm_free(pdev); return ret; }
static int sdhci_f_sdh30_probe(struct platform_device *pdev) { struct sdhci_host *host; struct device *dev = &pdev->dev; struct resource *res; int irq, ctrl = 0, ret = 0; struct f_sdhost_priv *priv; u32 reg = 0; irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "%s: no irq specified\n", __func__); return irq; } host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv)); if (IS_ERR(host)) return PTR_ERR(host); priv = sdhci_priv(host); priv->dev = dev; host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC | SDHCI_QUIRK_INVERTED_WRITE_PROTECT; host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE | SDHCI_QUIRK2_TUNING_WORK_AROUND; ret = mmc_of_parse(host->mmc); if (ret) goto err; platform_set_drvdata(pdev, host); sdhci_get_of_property(pdev); host->hw_name = "f_sdh30"; host->ops = &sdhci_f_sdh30_ops; host->irq = irq; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); host->ioaddr = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(host->ioaddr)) { ret = PTR_ERR(host->ioaddr); goto err; } priv->clk_iface = devm_clk_get(&pdev->dev, "iface"); if (IS_ERR(priv->clk_iface)) { ret = PTR_ERR(priv->clk_iface); goto err; } ret = clk_prepare_enable(priv->clk_iface); if (ret) goto err; priv->clk = devm_clk_get(&pdev->dev, "core"); if (IS_ERR(priv->clk)) { ret = PTR_ERR(priv->clk); goto err_clk; } ret = clk_prepare_enable(priv->clk); if (ret) goto err_clk; /* init vendor specific regs */ ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG); ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 | F_SDH30_AHB_INCR_4; ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN); sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG); reg = sdhci_readl(host, F_SDH30_ESD_CONTROL); sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); msleep(20); sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); reg = sdhci_readl(host, SDHCI_CAPABILITIES); if (reg & SDHCI_CAN_DO_8BIT) priv->vendor_hs200 = F_SDH30_EMMC_HS200; ret = sdhci_add_host(host); if (ret) goto err_add_host; return 0; err_add_host: clk_disable_unprepare(priv->clk); err_clk: clk_disable_unprepare(priv->clk_iface); err: sdhci_free_host(host); return ret; }
static int sdhci_at91_probe(struct platform_device *pdev) { const struct of_device_id *match; const struct sdhci_pltfm_data *soc_data; struct sdhci_host *host; struct sdhci_pltfm_host *pltfm_host; struct sdhci_at91_priv *priv; unsigned int caps0, caps1; unsigned int clk_base, clk_mul; unsigned int gck_rate, real_gck_rate; int ret; unsigned int preset_div, preset_common = 0x400; /* drv type B, programmable clock mode */ match = of_match_device(sdhci_at91_dt_match, &pdev->dev); if (!match) return -EINVAL; soc_data = match->data; priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); if (!priv) { dev_err(&pdev->dev, "unable to allocate private data\n"); return -ENOMEM; } priv->mainck = devm_clk_get(&pdev->dev, "baseclk"); if (IS_ERR(priv->mainck)) { dev_err(&pdev->dev, "failed to get baseclk\n"); return PTR_ERR(priv->mainck); } priv->hclock = devm_clk_get(&pdev->dev, "hclock"); if (IS_ERR(priv->hclock)) { dev_err(&pdev->dev, "failed to get hclock\n"); return PTR_ERR(priv->hclock); } priv->gck = devm_clk_get(&pdev->dev, "multclk"); if (IS_ERR(priv->gck)) { dev_err(&pdev->dev, "failed to get multclk\n"); return PTR_ERR(priv->gck); } host = sdhci_pltfm_init(pdev, soc_data, 0); if (IS_ERR(host)) return PTR_ERR(host); /* * The mult clock is provided by as a generated clock by the PMC * controller. In order to set the rate of gck, we have to get the * base clock rate and the clock mult from capabilities. */ clk_prepare_enable(priv->hclock); caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES); caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1); clk_base = (caps0 & SDHCI_CLOCK_V3_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; clk_mul = (caps1 & SDHCI_CLOCK_MUL_MASK) >> SDHCI_CLOCK_MUL_SHIFT; gck_rate = clk_base * 1000000 * (clk_mul + 1); ret = clk_set_rate(priv->gck, gck_rate); if (ret < 0) { dev_err(&pdev->dev, "failed to set gck"); goto hclock_disable_unprepare; } /* * We need to check if we have the requested rate for gck because in * some cases this rate could be not supported. If it happens, the rate * is the closest one gck can provide. We have to update the value * of clk mul. */ real_gck_rate = clk_get_rate(priv->gck); if (real_gck_rate != gck_rate) { clk_mul = real_gck_rate / (clk_base * 1000000) - 1; caps1 &= (~SDHCI_CLOCK_MUL_MASK); caps1 |= ((clk_mul << SDHCI_CLOCK_MUL_SHIFT) & SDHCI_CLOCK_MUL_MASK); /* Set capabilities in r/w mode. */ writel(SDMMC_CACR_KEY | SDMMC_CACR_CAPWREN, host->ioaddr + SDMMC_CACR); writel(caps1, host->ioaddr + SDHCI_CAPABILITIES_1); /* Set capabilities in ro mode. */ writel(0, host->ioaddr + SDMMC_CACR); dev_info(&pdev->dev, "update clk mul to %u as gck rate is %u Hz\n", clk_mul, real_gck_rate); } /* * We have to set preset values because it depends on the clk_mul * value. Moreover, SDR104 is supported in a degraded mode since the * maximum sd clock value is 120 MHz instead of 208 MHz. For that * reason, we need to use presets to support SDR104. */ preset_div = DIV_ROUND_UP(real_gck_rate, 24000000) - 1; writew(preset_common | preset_div, host->ioaddr + SDHCI_PRESET_FOR_SDR12); preset_div = DIV_ROUND_UP(real_gck_rate, 50000000) - 1; writew(preset_common | preset_div, host->ioaddr + SDHCI_PRESET_FOR_SDR25); preset_div = DIV_ROUND_UP(real_gck_rate, 100000000) - 1; writew(preset_common | preset_div, host->ioaddr + SDHCI_PRESET_FOR_SDR50); preset_div = DIV_ROUND_UP(real_gck_rate, 120000000) - 1; writew(preset_common | preset_div, host->ioaddr + SDHCI_PRESET_FOR_SDR104); preset_div = DIV_ROUND_UP(real_gck_rate, 50000000) - 1; writew(preset_common | preset_div, host->ioaddr + SDHCI_PRESET_FOR_DDR50); clk_prepare_enable(priv->mainck); clk_prepare_enable(priv->gck); pltfm_host = sdhci_priv(host); pltfm_host->priv = priv; ret = mmc_of_parse(host->mmc); if (ret) goto clocks_disable_unprepare; sdhci_get_of_property(pdev); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); pm_runtime_set_autosuspend_delay(&pdev->dev, 50); pm_runtime_use_autosuspend(&pdev->dev); ret = sdhci_add_host(host); if (ret) goto pm_runtime_disable; /* * When calling sdhci_runtime_suspend_host(), the sdhci layer makes * the assumption that all the clocks of the controller are disabled. * It means we can't get irq from it when it is runtime suspended. * For that reason, it is not planned to wake-up on a card detect irq * from the controller. * If we want to use runtime PM and to be able to wake-up on card * insertion, we have to use a GPIO for the card detection or we can * use polling. Be aware that using polling will resume/suspend the * controller between each attempt. * Disable SDHCI_QUIRK_BROKEN_CARD_DETECTION to be sure nobody tries * to enable polling via device tree with broken-cd property. */ if (!(host->mmc->caps & MMC_CAP_NONREMOVABLE) && IS_ERR_VALUE(mmc_gpio_get_cd(host->mmc))) { host->mmc->caps |= MMC_CAP_NEEDS_POLL; host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; } pm_runtime_put_autosuspend(&pdev->dev); return 0; pm_runtime_disable: pm_runtime_disable(&pdev->dev); pm_runtime_set_suspended(&pdev->dev); pm_runtime_put_noidle(&pdev->dev); clocks_disable_unprepare: clk_disable_unprepare(priv->gck); clk_disable_unprepare(priv->mainck); hclock_disable_unprepare: clk_disable_unprepare(priv->hclock); sdhci_pltfm_free(pdev); return ret; }
static int sdhci_acpi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; acpi_handle handle = ACPI_HANDLE(dev); struct acpi_device *device; struct sdhci_acpi_host *c; struct sdhci_host *host; struct resource *iomem; resource_size_t len; const char *hid; int err; if (acpi_bus_get_device(handle, &device)) return -ENODEV; if (acpi_bus_get_status(device) || !device->status.present) return -ENODEV; hid = acpi_device_hid(device); iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!iomem) return -ENOMEM; len = resource_size(iomem); if (len < 0x100) dev_err(dev, "Invalid iomem size!\n"); if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev))) return -ENOMEM; host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host)); if (IS_ERR(host)) return PTR_ERR(host); c = sdhci_priv(host); c->host = host; c->slot = sdhci_acpi_get_slot(handle, hid); c->pdev = pdev; c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM); platform_set_drvdata(pdev, c); host->hw_name = "ACPI"; host->ops = &sdhci_acpi_ops_dflt; host->irq = platform_get_irq(pdev, 0); host->ioaddr = devm_ioremap_nocache(dev, iomem->start, resource_size(iomem)); if (host->ioaddr == NULL) { err = -ENOMEM; goto err_free; } if (!dev->dma_mask) { u64 dma_mask; if (sdhci_readl(host, SDHCI_CAPABILITIES) & SDHCI_CAN_64BIT) { /* 64-bit DMA is not supported at present */ dma_mask = DMA_BIT_MASK(32); } else { dma_mask = DMA_BIT_MASK(32); } err = dma_coerce_mask_and_coherent(dev, dma_mask); if (err) goto err_free; } if (c->slot) { if (c->slot->chip) { host->ops = c->slot->chip->ops; host->quirks |= c->slot->chip->quirks; host->quirks2 |= c->slot->chip->quirks2; host->mmc->caps |= c->slot->chip->caps; host->mmc->caps2 |= c->slot->chip->caps2; host->mmc->pm_caps |= c->slot->chip->pm_caps; } host->quirks |= c->slot->quirks; host->quirks2 |= c->slot->quirks2; host->mmc->caps |= c->slot->caps; host->mmc->caps2 |= c->slot->caps2; host->mmc->pm_caps |= c->slot->pm_caps; } host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; err = sdhci_add_host(host); if (err) goto err_free; if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) { if (sdhci_acpi_add_own_cd(dev, host->mmc)) c->use_runtime_pm = false; } if (c->use_runtime_pm) { pm_runtime_set_active(dev); pm_suspend_ignore_children(dev, 1); pm_runtime_set_autosuspend_delay(dev, 50); pm_runtime_use_autosuspend(dev); pm_runtime_enable(dev); } return 0; err_free: sdhci_free_host(c->host); return err; }
static int __devinit tegra_sdhci_probe(struct platform_device *pdev) { int rc; struct tegra_sdhci_platform_data *plat; struct sdhci_host *sdhci; struct tegra_sdhci_host *host; struct resource *res; int irq; void __iomem *ioaddr; plat = pdev->dev.platform_data; if (plat == NULL) return -ENXIO; res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (res == NULL) return -ENODEV; irq = res->start; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (res == NULL) return -ENODEV; ioaddr = ioremap(res->start, res->end - res->start); sdhci = sdhci_alloc_host(&pdev->dev, sizeof(struct tegra_sdhci_host)); if (IS_ERR(sdhci)) { rc = PTR_ERR(sdhci); goto err_unmap; } host = sdhci_priv(sdhci); host->sdhci = sdhci; host->card_always_on = (plat->power_gpio == -1) ? 1 : 0; host->wp_gpio = plat->wp_gpio; host->clk = clk_get(&pdev->dev, plat->clk_id); if (IS_ERR(host->clk)) { rc = PTR_ERR(host->clk); goto err_free_host; } rc = clk_enable(host->clk); if (rc != 0) goto err_clkput; host->clk_enabled = 1; sdhci->hw_name = "tegra"; sdhci->ops = &tegra_sdhci_ops; sdhci->irq = irq; sdhci->ioaddr = ioaddr; sdhci->version = SDHCI_SPEC_200; sdhci->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_SINGLE_POWER_WRITE | SDHCI_QUIRK_ENABLE_INTERRUPT_AT_BLOCK_GAP | SDHCI_QUIRK_BROKEN_WRITE_PROTECT | SDHCI_QUIRK_BROKEN_CTRL_HISPD | SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_8_BIT_DATA | SDHCI_QUIRK_NO_VERSION_REG | SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC | SDHCI_QUIRK_RUNTIME_DISABLE; if (plat->force_hs != 0) sdhci->quirks |= SDHCI_QUIRK_FORCE_HIGH_SPEED_MODE; #ifdef CONFIG_MMC_EMBEDDED_SDIO mmc_set_embedded_sdio_data(sdhci->mmc, &plat->cis, &plat->cccr, plat->funcs, plat->num_funcs); #endif if (host->card_always_on) sdhci->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY; rc = sdhci_add_host(sdhci); if (rc) goto err_clk_disable; platform_set_drvdata(pdev, host); if (plat->cd_gpio != -1) { rc = request_irq(gpio_to_irq(plat->cd_gpio), carddetect_irq, IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, mmc_hostname(sdhci->mmc), sdhci); if (rc) goto err_remove_host; } else if (plat->register_status_notify) { plat->register_status_notify( tegra_sdhci_status_notify_cb, sdhci); } if (plat->board_probe) plat->board_probe(pdev->id, sdhci->mmc); printk(KERN_INFO "sdhci%d: initialized irq %d ioaddr %p\n", pdev->id, sdhci->irq, sdhci->ioaddr); return 0; err_remove_host: sdhci_remove_host(sdhci, 1); err_clk_disable: clk_disable(host->clk); err_clkput: clk_put(host->clk); err_free_host: if (sdhci) sdhci_free_host(sdhci); err_unmap: iounmap(sdhci->ioaddr); return rc; }
static int __devinit sdhci_s3c_probe(struct platform_device *pdev) { struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; struct device *dev = &pdev->dev; struct sdhci_host *host; struct sdhci_s3c *sc; struct resource *res; int ret, irq, ptr, clks; if (!pdata) { dev_err(dev, "no device data specified\n"); return -ENOENT; } irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(dev, "no irq specified\n"); return irq; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "no memory specified\n"); return -ENOENT; } host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); if (IS_ERR(host)) { dev_err(dev, "sdhci_alloc_host() failed\n"); return PTR_ERR(host); } sc = sdhci_priv(host); sc->host = host; sc->pdev = pdev; sc->pdata = pdata; sc->ext_cd_gpio = -1; platform_set_drvdata(pdev, host); sc->clk_io = clk_get(dev, "hsmmc"); if (IS_ERR(sc->clk_io)) { dev_err(dev, "failed to get io clock\n"); ret = PTR_ERR(sc->clk_io); goto err_io_clk; } /* enable the local io clock and keep it running for the moment. */ clk_enable(sc->clk_io); for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { struct clk *clk; char *name = pdata->clocks[ptr]; if (name == NULL) continue; clk = clk_get(dev, name); if (IS_ERR(clk)) { dev_err(dev, "failed to get clock %s\n", name); continue; } clks++; sc->clk_bus[ptr] = clk; clk_enable(clk); sc->cur_clk = ptr; dev_info(dev, "clock source %d: %s (%ld Hz)\n", ptr, name, clk_get_rate(clk)); } if (clks == 0) { dev_err(dev, "failed to find any bus clocks\n"); ret = -ENOENT; goto err_no_busclks; } sc->ioarea = request_mem_region(res->start, resource_size(res), mmc_hostname(host->mmc)); if (!sc->ioarea) { dev_err(dev, "failed to reserve register area\n"); ret = -ENXIO; goto err_req_regs; } host->ioaddr = ioremap_nocache(res->start, resource_size(res)); if (!host->ioaddr) { dev_err(dev, "failed to map registers\n"); ret = -ENXIO; goto err_req_regs; } /* Ensure we have minimal gpio selected CMD/CLK/Detect */ if (pdata->cfg_gpio) pdata->cfg_gpio(pdev, pdata->max_width); host->hw_name = "samsung-hsmmc"; host->ops = &sdhci_s3c_ops; host->quirks = 0; host->irq = irq; /* Setup quirks for the controller */ host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; #ifndef CONFIG_MMC_SDHCI_S3C_DMA /* we currently see overruns on errors, so disable the SDMA * support as well. */ host->quirks |= SDHCI_QUIRK_BROKEN_DMA; #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ /* It seems we do not get an DATA transfer complete on non-busy * transfers, not sure if this is a problem with this specific * SDHCI block, or a missing configuration that needs to be set. */ host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; if (pdata->cd_type == S3C_SDHCI_CD_NONE) host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE); /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; /* IF SD controller's WP pin donsn't connected with SD card and there is an * allocated GPIO for getting WP data form SD card, use this quirk and send * the GPIO number in pdata->wp_gpio. */ if (pdata->has_wp_gpio && gpio_is_valid(pdata->wp_gpio)) { sdhci_s3c_ops.get_ro = sdhci_s3c_get_ro; host->quirks |= SDHCI_QUIRK_NO_WP_BIT; sdhci_s3c_cfg_wp(pdata->wp_gpio); } host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; #ifdef CONFIG_ARCH_S5PV310 host->quirks |= SDHCI_QUIRK_NONSTANDARD_CLOCK; host->quirks |= SDHCI_QUIRK_BROKEN_CLOCK_DIVIDER; #endif if(pdata->host_caps) host->mmc->caps |= pdata->host_caps; /* Fill External GPIO Value */ if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) { pr_info("%s : S3C_SDHCI_CD_PERMANENT\n", __func__); if(gpio_is_valid(pdata->ext_cd_gpio)) { pr_info("%s : MMC GPIO Level is %d\n", __func__ , gpio_get_value(pdata->ext_cd_gpio)); gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD"); sc->ext_cd_gpio = gpio_get_value(pdata->ext_cd_gpio); } } if (pdata->cd_type == S3C_SDHCI_CD_GPIO && gpio_is_valid(pdata->ext_cd_gpio)) { pr_info("%s : S3C_SDHCI_CD_GPIO\n", __func__); gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD"); sc->ext_cd_gpio = pdata->ext_cd_gpio; sc->regulator_workq = create_singlethread_workqueue("ktflash_requlatord"); if (!sc->regulator_workq) { pr_info("%s : ERROR: workqueue for Tflash's regulator.\n" "Regulator for Tflash will be always ON\n", __func__); } INIT_DELAYED_WORK(&sc->regul_work, sdhci_s3c_requlator_work); sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio); if (sc->ext_cd_irq && request_irq(sc->ext_cd_irq, sdhci_s3c_gpio_card_detect_isr, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, dev_name(&pdev->dev), sc)) { dev_err(&pdev->dev, "cannot request irq for card detect\n"); sc->ext_cd_irq = 0; } if (tflash_detection_cmd_dev == NULL && sc->ext_cd_gpio) { tflash_detection_cmd_dev = device_create(sec_class, NULL, 0, NULL, "tctest"); if (IS_ERR(tflash_detection_cmd_dev)) pr_err("%s : Failed to create device(ts)!\n", __func__); if (device_create_file(tflash_detection_cmd_dev, &dev_attr_tftest) < 0) pr_err("%s : Failed to create device file(%s)!\n", __func__, dev_attr_tftest.attr.name); dev_set_drvdata(tflash_detection_cmd_dev, sc); } /* T-Flash EINT for CD SHOULD be wakeup source */ set_irq_wake(sc->ext_cd_irq, 1); } /* Call sdhci_host */ ret = sdhci_add_host(host); if (ret) { dev_err(dev, "sdhci_add_host() failed\n"); goto err_add_host; } if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) { host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; host->mmc->caps |= MMC_CAP_NONREMOVABLE; } /* pdata->ext_cd_init might call sdhci_s3c_notify_change immediately, so it can be called only after sdhci_add_host() */ if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) { pr_info("%s : S3C_SDHCI_CD_EXTERNAL and external init\n", __func__); pdata->ext_cd_init(&sdhci_s3c_notify_change); } if (pdata->cd_type == S3C_SDHCI_CD_GPIO && gpio_is_valid(pdata->ext_cd_gpio)) { host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; } return 0; err_add_host: release_resource(sc->ioarea); kfree(sc->ioarea); err_req_regs: for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { clk_disable(sc->clk_bus[ptr]); clk_put(sc->clk_bus[ptr]); } err_no_busclks: clk_disable(sc->clk_io); clk_put(sc->clk_io); err_io_clk: sdhci_free_host(host); return ret; }
static int sdhci_sirf_probe(struct platform_device *pdev) { struct sdhci_host *host; struct sdhci_pltfm_host *pltfm_host; struct sdhci_sirf_priv *priv; struct clk *clk; int gpio_cd; int ret; clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(clk)) { dev_err(&pdev->dev, "unable to get clock"); return PTR_ERR(clk); } if (pdev->dev.of_node) gpio_cd = of_get_named_gpio(pdev->dev.of_node, "cd-gpios", 0); else gpio_cd = -EINVAL; host = sdhci_pltfm_init(pdev, &sdhci_sirf_pdata, sizeof(struct sdhci_sirf_priv)); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); pltfm_host->clk = clk; priv = sdhci_pltfm_priv(pltfm_host); priv->gpio_cd = gpio_cd; sdhci_get_of_property(pdev); ret = clk_prepare_enable(pltfm_host->clk); if (ret) goto err_clk_prepare; ret = sdhci_add_host(host); if (ret) goto err_sdhci_add; /* * We must request the IRQ after sdhci_add_host(), as the tasklet only * gets setup in sdhci_add_host() and we oops. */ if (gpio_is_valid(priv->gpio_cd)) { ret = mmc_gpio_request_cd(host->mmc, priv->gpio_cd, 0); if (ret) { dev_err(&pdev->dev, "card detect irq request failed: %d\n", ret); goto err_request_cd; } mmc_gpiod_request_cd_irq(host->mmc); } return 0; err_request_cd: sdhci_remove_host(host, 0); err_sdhci_add: clk_disable_unprepare(pltfm_host->clk); err_clk_prepare: sdhci_pltfm_free(pdev); return ret; }
static int sdhci_dove_probe(struct platform_device *pdev) { struct sdhci_host *host; struct sdhci_pltfm_host *pltfm_host; struct sdhci_dove_priv *priv; int ret; priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), GFP_KERNEL); if (!priv) { dev_err(&pdev->dev, "unable to allocate private data"); return -ENOMEM; } priv->clk = devm_clk_get(&pdev->dev, NULL); if (pdev->dev.of_node) { priv->gpio_cd = of_get_named_gpio(pdev->dev.of_node, "cd-gpios", 0); } else { priv->gpio_cd = -EINVAL; } if (gpio_is_valid(priv->gpio_cd)) { ret = gpio_request(priv->gpio_cd, "sdhci-cd"); if (ret) { dev_err(&pdev->dev, "card detect gpio request failed: %d\n", ret); return ret; } gpio_direction_input(priv->gpio_cd); } host = sdhci_pltfm_init(pdev, &sdhci_dove_pdata, 0); if (IS_ERR(host)) { ret = PTR_ERR(host); goto err_sdhci_pltfm_init; } pltfm_host = sdhci_priv(host); pltfm_host->priv = priv; if (!IS_ERR(priv->clk)) clk_prepare_enable(priv->clk); sdhci_get_of_property(pdev); ret = sdhci_add_host(host); if (ret) goto err_sdhci_add; /* * We must request the IRQ after sdhci_add_host(), as the tasklet only * gets setup in sdhci_add_host() and we oops. */ if (gpio_is_valid(priv->gpio_cd)) { ret = request_irq(gpio_to_irq(priv->gpio_cd), sdhci_dove_carddetect_irq, IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, mmc_hostname(host->mmc), host); if (ret) { dev_err(&pdev->dev, "card detect irq request failed: %d\n", ret); goto err_request_irq; } } return 0; err_request_irq: sdhci_remove_host(host, 0); err_sdhci_add: if (!IS_ERR(priv->clk)) clk_disable_unprepare(priv->clk); sdhci_pltfm_free(pdev); err_sdhci_pltfm_init: if (gpio_is_valid(priv->gpio_cd)) gpio_free(priv->gpio_cd); return ret; }
static int __devinit sdhci_probe(struct platform_device *pdev) { struct sdhci_host *host; struct resource *iomem; struct spear_sdhci *sdhci; int ret; BUG_ON(pdev == NULL); iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!iomem) { ret = -ENOMEM; dev_dbg(&pdev->dev, "memory resource not defined\n"); goto err; } if (!request_mem_region(iomem->start, resource_size(iomem), "spear-sdhci")) { ret = -EBUSY; dev_dbg(&pdev->dev, "cannot request region\n"); goto err; } sdhci = kzalloc(sizeof(*sdhci), GFP_KERNEL); if (!sdhci) { ret = -ENOMEM; dev_dbg(&pdev->dev, "cannot allocate memory for sdhci\n"); goto err_kzalloc; } /* clk enable */ sdhci->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(sdhci->clk)) { ret = PTR_ERR(sdhci->clk); dev_dbg(&pdev->dev, "Error getting clock\n"); goto err_clk_get; } ret = clk_enable(sdhci->clk); if (ret) { dev_dbg(&pdev->dev, "Error enabling clock\n"); goto err_clk_enb; } /* overwrite platform_data */ sdhci->data = dev_get_platdata(&pdev->dev); pdev->dev.platform_data = sdhci; if (pdev->dev.parent) host = sdhci_alloc_host(pdev->dev.parent, 0); else host = sdhci_alloc_host(&pdev->dev, 0); if (IS_ERR(host)) { ret = PTR_ERR(host); dev_dbg(&pdev->dev, "error allocating host\n"); goto err_alloc_host; } host->hw_name = "sdhci"; host->ops = &sdhci_pltfm_ops; host->irq = platform_get_irq(pdev, 0); host->quirks = SDHCI_QUIRK_BROKEN_ADMA; host->ioaddr = ioremap(iomem->start, resource_size(iomem)); if (!host->ioaddr) { ret = -ENOMEM; dev_dbg(&pdev->dev, "failed to remap registers\n"); goto err_ioremap; } ret = sdhci_add_host(host); if (ret) { dev_dbg(&pdev->dev, "error adding host\n"); goto err_add_host; } platform_set_drvdata(pdev, host); /* * It is optional to use GPIOs for sdhci Power control & sdhci card * interrupt detection. If sdhci->data is NULL, then use original sdhci * lines otherwise GPIO lines. * If GPIO is selected for power control, then power should be disabled * after card removal and should be enabled when card insertion * interrupt occurs */ if (!sdhci->data) return 0; if (sdhci->data->card_power_gpio >= 0) { int val = 0; ret = gpio_request(sdhci->data->card_power_gpio, "sdhci"); if (ret < 0) { dev_dbg(&pdev->dev, "gpio request fail: %d\n", sdhci->data->card_power_gpio); goto err_pgpio_request; } if (sdhci->data->power_always_enb) val = sdhci->data->power_active_high; else val = !sdhci->data->power_active_high; ret = gpio_direction_output(sdhci->data->card_power_gpio, val); if (ret) { dev_dbg(&pdev->dev, "gpio set direction fail: %d\n", sdhci->data->card_power_gpio); goto err_pgpio_direction; } gpio_set_value(sdhci->data->card_power_gpio, 1); } if (sdhci->data->card_int_gpio >= 0) { ret = gpio_request(sdhci->data->card_int_gpio, "sdhci"); if (ret < 0) { dev_dbg(&pdev->dev, "gpio request fail: %d\n", sdhci->data->card_int_gpio); goto err_igpio_request; } ret = gpio_direction_input(sdhci->data->card_int_gpio); if (ret) { dev_dbg(&pdev->dev, "gpio set direction fail: %d\n", sdhci->data->card_int_gpio); goto err_igpio_direction; } ret = request_irq(gpio_to_irq(sdhci->data->card_int_gpio), sdhci_gpio_irq, IRQF_TRIGGER_LOW, mmc_hostname(host->mmc), pdev); if (ret) { dev_dbg(&pdev->dev, "gpio request irq fail: %d\n", sdhci->data->card_int_gpio); goto err_igpio_request_irq; } } return 0; err_igpio_request_irq: err_igpio_direction: if (sdhci->data->card_int_gpio >= 0) gpio_free(sdhci->data->card_int_gpio); err_igpio_request: err_pgpio_direction: if (sdhci->data->card_power_gpio >= 0) gpio_free(sdhci->data->card_power_gpio); err_pgpio_request: platform_set_drvdata(pdev, NULL); sdhci_remove_host(host, 1); err_add_host: iounmap(host->ioaddr); err_ioremap: sdhci_free_host(host); err_alloc_host: clk_disable(sdhci->clk); err_clk_enb: clk_put(sdhci->clk); err_clk_get: kfree(sdhci); err_kzalloc: release_mem_region(iomem->start, resource_size(iomem)); err: dev_err(&pdev->dev, "spear-sdhci probe failed: %d\n", ret); return ret; }
static int sdhci_bcm2708_probe(struct platform_device *pdev) { struct sdhci_host *host; struct resource *iomem; struct sdhci_bcm2708_priv *host_priv; int ret; BUG_ON(pdev == NULL); iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!iomem) { ret = -ENOMEM; goto err; } if (resource_size(iomem) != 0x100) dev_err(&pdev->dev, "Invalid iomem size. You may " "experience problems.\n"); if (pdev->dev.parent) host = sdhci_alloc_host(pdev->dev.parent, sizeof(struct sdhci_bcm2708_priv)); else host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_bcm2708_priv)); if (IS_ERR(host)) { ret = PTR_ERR(host); goto err; } if (missing_status) { sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status; } if( spurious_crc_acmd51 ) { sdhci_bcm2708_ops.spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc_acmd51; } printk("sdhci: %s low-latency mode\n",enable_llm?"Enable":"Disable"); host->hw_name = "BCM2708_Arasan"; host->ops = &sdhci_bcm2708_ops; host->irq = platform_get_irq(pdev, 0); host->second_irq = 0; host->quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_MISSING_CAPS | SDHCI_QUIRK_NO_HISPD_BIT | (sync_after_dma ? 0:SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12); #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA host->flags = SDHCI_USE_PLATDMA; #endif if (!request_mem_region(iomem->start, resource_size(iomem), mmc_hostname(host->mmc))) { dev_err(&pdev->dev, "cannot request region\n"); ret = -EBUSY; goto err_request; } host->ioaddr = ioremap(iomem->start, resource_size(iomem)); if (!host->ioaddr) { dev_err(&pdev->dev, "failed to remap registers\n"); ret = -ENOMEM; goto err_remap; } host_priv = SDHCI_HOST_PRIV(host); #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA host_priv->dma_wanted = 0; #ifdef CHECK_DMA_USE host_priv->dmas_pending = 0; host_priv->when_started = 0; host_priv->when_reset = 0; host_priv->when_stopped = 0; #endif host_priv->sg_ix = 0; host_priv->sg_done = 0; host_priv->complete = NULL; host_priv->dma_waits = SDHCI_BCM_DMA_WAITS; host_priv->cb_base = dma_alloc_writecombine(&pdev->dev, SZ_4K, &host_priv->cb_handle, GFP_KERNEL); if (!host_priv->cb_base) { dev_err(&pdev->dev, "cannot allocate DMA CBs\n"); ret = -ENOMEM; goto err_alloc_cb; } ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_FAST, &host_priv->dma_chan_base, &host_priv->dma_irq); if (ret < 0) { dev_err(&pdev->dev, "couldn't allocate a DMA channel\n"); goto err_add_dma; } host_priv->dma_chan = ret; ret = request_irq(host_priv->dma_irq, sdhci_bcm2708_dma_irq,0,//IRQF_SHARED, DRIVER_NAME " (dma)", host); if (ret) { dev_err(&pdev->dev, "cannot set DMA IRQ\n"); goto err_add_dma_irq; } host->second_irq = host_priv->dma_irq; DBG("DMA CBs %p handle %08X DMA%d %p DMA IRQ %d\n", host_priv->cb_base, (unsigned)host_priv->cb_handle, host_priv->dma_chan, host_priv->dma_chan_base, host_priv->dma_irq); // we support 3.3V host->caps |= SDHCI_CAN_VDD_330; if (allow_highspeed) host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; /* single block writes cause data loss with some SD cards! */ host->mmc->caps2 |= MMC_CAP2_FORCE_MULTIBLOCK; #endif ret = sdhci_add_host(host); if (ret) goto err_add_host; platform_set_drvdata(pdev, host); ret = device_create_file(&pdev->dev, &dev_attr_use_dma); ret = device_create_file(&pdev->dev, &dev_attr_dma_wait); ret = device_create_file(&pdev->dev, &dev_attr_status); #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA /* enable extension fifo for paced DMA transfers */ sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN); sdhci_bcm2708_writel(host, 4, REG_EXRDFIFO_CFG); #endif printk(KERN_INFO "%s: BCM2708 SDHC host at 0x%08llx DMA %d IRQ %d\n", mmc_hostname(host->mmc), (unsigned long long)iomem->start, host_priv->dma_chan, host_priv->dma_irq); return 0; err_add_host: #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA free_irq(host_priv->dma_irq, host); err_add_dma_irq: bcm_dma_chan_free(host_priv->dma_chan); err_add_dma: dma_free_writecombine(&pdev->dev, SZ_4K, host_priv->cb_base, host_priv->cb_handle); err_alloc_cb: #endif iounmap(host->ioaddr); err_remap: release_mem_region(iomem->start, resource_size(iomem)); err_request: sdhci_free_host(host); err: dev_err(&pdev->dev, "probe failed, err %d\n", ret); return ret; }
static int __devinit sdhci_of_probe(struct platform_device *ofdev) { const struct of_device_id *match; struct device_node *np = ofdev->dev.of_node; struct sdhci_of_data *sdhci_of_data; struct sdhci_host *host; struct sdhci_of_host *of_host; const __be32 *clk; int size; int ret; match = of_match_device(sdhci_of_match, &ofdev->dev); if (!match) return -EINVAL; sdhci_of_data = match->data; if (!of_device_is_available(np)) return -ENODEV; host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host)); if (IS_ERR(host)) return -ENOMEM; of_host = sdhci_priv(host); dev_set_drvdata(&ofdev->dev, host); host->ioaddr = of_iomap(np, 0); if (!host->ioaddr) { ret = -ENOMEM; goto err_addr_map; } host->irq = irq_of_parse_and_map(np, 0); if (!host->irq) { ret = -EINVAL; goto err_no_irq; } host->hw_name = dev_name(&ofdev->dev); if (sdhci_of_data) { host->quirks = sdhci_of_data->quirks; host->ops = &sdhci_of_data->ops; } if (of_get_property(np, "sdhci,auto-cmd12", NULL)) host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; if (of_get_property(np, "sdhci,1-bit-only", NULL)) host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; if (sdhci_of_wp_inverted(np)) host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT; clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) of_host->clock = be32_to_cpup(clk); ret = sdhci_add_host(host); if (ret) goto err_add_host; return 0; err_add_host: irq_dispose_mapping(host->irq); err_no_irq: iounmap(host->ioaddr); err_addr_map: sdhci_free_host(host); return ret; }
static int sdhci_tegra_probe(struct platform_device *pdev) { const struct of_device_id *match; const struct sdhci_tegra_soc_data *soc_data; struct sdhci_host *host; struct sdhci_pltfm_host *pltfm_host; struct sdhci_tegra *tegra_host; struct clk *clk; int rc; match = of_match_device(sdhci_tegra_dt_match, &pdev->dev); if (!match) return -EINVAL; soc_data = match->data; host = sdhci_pltfm_init(pdev, soc_data->pdata, 0); if (IS_ERR(host)) return PTR_ERR(host); pltfm_host = sdhci_priv(host); tegra_host = devm_kzalloc(&pdev->dev, sizeof(*tegra_host), GFP_KERNEL); if (!tegra_host) { dev_err(mmc_dev(host->mmc), "failed to allocate tegra_host\n"); rc = -ENOMEM; goto err_alloc_tegra_host; } tegra_host->soc_data = soc_data; pltfm_host->priv = tegra_host; rc = sdhci_tegra_parse_dt(&pdev->dev); if (rc) goto err_parse_dt; if (gpio_is_valid(tegra_host->power_gpio)) { rc = gpio_request(tegra_host->power_gpio, "sdhci_power"); if (rc) { dev_err(mmc_dev(host->mmc), "failed to allocate power gpio\n"); goto err_power_req; } gpio_direction_output(tegra_host->power_gpio, 1); } clk = clk_get(mmc_dev(host->mmc), NULL); if (IS_ERR(clk)) { dev_err(mmc_dev(host->mmc), "clk err\n"); rc = PTR_ERR(clk); goto err_clk_get; } clk_prepare_enable(clk); pltfm_host->clk = clk; rc = sdhci_add_host(host); if (rc) goto err_add_host; return 0; err_add_host: clk_disable_unprepare(pltfm_host->clk); clk_put(pltfm_host->clk); err_clk_get: if (gpio_is_valid(tegra_host->power_gpio)) gpio_free(tegra_host->power_gpio); err_power_req: err_parse_dt: err_alloc_tegra_host: sdhci_pltfm_free(pdev); return rc; }
static int __devinit sdhci_pltfm_probe(struct platform_device *pdev) { struct sdhci_pltfm_data *pdata = pdev->dev.platform_data; const struct platform_device_id *platid = platform_get_device_id(pdev); struct sdhci_host *host; struct resource *iomem; int ret; if (!pdata && platid && platid->driver_data) pdata = (void *)platid->driver_data; iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!iomem) { ret = -ENOMEM; goto err; } if (resource_size(iomem) < 0x100) dev_err(&pdev->dev, "Invalid iomem size. You may " "experience problems.\n"); if (pdev->dev.parent) host = sdhci_alloc_host(pdev->dev.parent, 0); else host = sdhci_alloc_host(&pdev->dev, 0); if (IS_ERR(host)) { ret = PTR_ERR(host); goto err; } host->hw_name = "platform"; if (pdata && pdata->ops) host->ops = pdata->ops; else host->ops = &sdhci_pltfm_ops; if (pdata) host->quirks = pdata->quirks; host->irq = platform_get_irq(pdev, 0); if (!request_mem_region(iomem->start, resource_size(iomem), mmc_hostname(host->mmc))) { dev_err(&pdev->dev, "cannot request region\n"); ret = -EBUSY; goto err_request; } host->ioaddr = ioremap(iomem->start, resource_size(iomem)); if (!host->ioaddr) { dev_err(&pdev->dev, "failed to remap registers\n"); ret = -ENOMEM; goto err_remap; } if (pdata && pdata->init) { ret = pdata->init(host); if (ret) goto err_plat_init; } ret = sdhci_add_host(host); if (ret) goto err_add_host; platform_set_drvdata(pdev, host); return 0; err_add_host: if (pdata && pdata->exit) pdata->exit(host); err_plat_init: iounmap(host->ioaddr); err_remap: release_mem_region(iomem->start, resource_size(iomem)); err_request: sdhci_free_host(host); err: printk(KERN_ERR"Probing of sdhci-pltfm failed: %d\n", ret); return ret; }
static int __devinit sdhci_of_probe(struct of_device *ofdev, const struct of_device_id *match) { struct device_node *np = ofdev->dev.of_node; struct sdhci_of_data *sdhci_of_data = match->data; struct sdhci_host *host; struct sdhci_of_host *of_host; const u32 *clk; int size; int ret; if (!of_device_is_available(np)) return -ENODEV; host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host)); if (IS_ERR(host)) return -ENOMEM; of_host = sdhci_priv(host); dev_set_drvdata(&ofdev->dev, host); host->ioaddr = of_iomap(np, 0); if (!host->ioaddr) { ret = -ENOMEM; goto err_addr_map; } host->irq = irq_of_parse_and_map(np, 0); if (!host->irq) { ret = -EINVAL; goto err_no_irq; } host->hw_name = dev_name(&ofdev->dev); if (sdhci_of_data) { host->quirks = sdhci_of_data->quirks; host->ops = &sdhci_of_data->ops; } if (of_get_property(np, "sdhci,1-bit-only", NULL)) host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA; if (sdhci_of_wp_inverted(np)) host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT; if (of_get_property(np, "fsl,sdhci-dma-broken", NULL)) host->quirks |= SDHCI_QUIRK_BROKEN_DMA; if (of_get_property(np, "fsl,sdhci-ahb2mag-irq-bypass", NULL)) host->quirks |= SDHCI_QUIRK_SET_AHB2MAG_IRQ_BYPASS; if (of_get_property(np, "fsl,sdhci-adjust-timeout", NULL)) host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) of_host->clock = *clk; ret = sdhci_add_host(host); if (ret) goto err_add_host; return 0; err_add_host: irq_dispose_mapping(host->irq); err_no_irq: iounmap(host->ioaddr); err_addr_map: sdhci_free_host(host); return ret; }