C++ (Cpp) sdram_set_registers Examples

Example #1

File: romstage.c Project: 0ida/coreboot

void main(unsigned long bist)
{
	if (bist == 0) {
#if 0
		enable_lapic();
		init_timer();
#endif
	}

	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();

	/* Halt if there was a built in self test failure */
	report_bist_failure(bist);

#if 0
	print_pci_devices();
#endif

	if (!bios_reset_detected()) {
        	enable_smbus();
#if 0
		dump_spd_registers();
		dump_smbus_registers();
#endif
		sdram_set_registers();
		sdram_set_spd_registers();
		sdram_enable();
	}

#if 0
	dump_pci_devices();
	dump_pci_device(PCI_DEV(0, 0, 0));
#endif
}

Example #2

File: romstage.c Project: tidatida/coreboot

void main(unsigned long bist)
{
	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();
	enable_smbus();
	report_bist_failure(bist);
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
}

Example #3

File: generic_sdram.c Project: 0ida/coreboot

void sdram_initialize(int controllers, const struct mem_controller *ctrl)
#endif
{
    int i;
    /* Set the registers we can set once to reasonable values */
    for(i = 0; i < controllers; i++) {
        print_debug_sdram_8("Ram1.", i);

#if CONFIG_RAMINIT_SYSINFO
        sdram_set_registers(ctrl + i, sysinfo);
#else
        sdram_set_registers(ctrl + i);
#endif
    }

    /* Now setup those things we can auto detect */
    for(i = 0; i < controllers; i++) {
        print_debug_sdram_8("Ram2.", i);

#if CONFIG_RAMINIT_SYSINFO
        sdram_set_spd_registers(ctrl + i, sysinfo);
#else
        sdram_set_spd_registers(ctrl + i);
#endif

    }

    /* Now that everything is setup enable the SDRAM.
     * Some chipsets do the work for us while on others
     * we need to it by hand.
     */
    print_debug("Ram3\n");

#if CONFIG_RAMINIT_SYSINFO
    sdram_enable(controllers, ctrl, sysinfo);
#else
    sdram_enable(controllers, ctrl);
#endif

    print_debug("Ram4\n");
}

Example #4

File: romstage.c Project: Oxyoptia/coreboot

void mainboard_romstage_entry(unsigned long bist)
{
	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();
	report_bist_failure(bist);

	enable_smbus();
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
}

Example #5

File: romstage.c Project: Oxyoptia/coreboot

void mainboard_romstage_entry(unsigned long bist)
{
	/* TODO: It's a PC87364 actually! */
	pc87360_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();
	enable_smbus();
	report_bist_failure(bist);
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
}

Example #6

File: romstage.c Project: B-Rich/coreboot

void main(unsigned long bist)
{
    w83627hf_set_clksel_48(DUMMY_DEV);
    winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

    console_init();
    enable_smbus();
    report_bist_failure(bist);
    dump_spd_registers();
    sdram_set_registers();
    sdram_set_spd_registers();
    sdram_enable();
}

Example #7

File: romstage.c Project: RafaelRMachado/Coreboot

void main(unsigned long bist)
{
	ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24);
	ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();
	report_bist_failure(bist);
	enable_smbus();
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
	dump_spd_registers();
}

Example #8

File: romstage.c Project: hustcalm/coreboot-hacking

void main(unsigned long bist)
{
	/* FIXME: Should be PC97307! */
	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();
	report_bist_failure(bist);

	enable_smbus();
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
}

Example #9

File: romstage.c Project: hustcalm/coreboot-hacking

void main(unsigned long bist)
{
	/* FIXME: It's a Winbond W83977EF, actually. */
	w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();
	report_bist_failure(bist);

	enable_smbus();
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
}

Example #10

File: romstage.c Project: DarkDefender/coreboot

void main(unsigned long bist)
{
	it8712f_24mhz_clkin();
	it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter
	console_init();
	report_bist_failure(bist);
	enable_smbus();
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
	dump_spd_registers();
}

Example #11

File: raminit.c Project: AdriDlu/coreboot

/*
 * Support one DIMM with up to 2 ranks.
 */
static void ddr_ram_setup(const struct mem_controller *ctrl)
{
	u8 reg;

	c7_cpu_setup(ctrl->d0f2);
	sdram_set_registers(ctrl);
	sdram_set_size(ctrl);
	sdram_enable(ctrl->d0f3, (u8 *)0);
	reg = pci_read_config8(ctrl->d0f3, 0x41);
	if (reg != 0)
		sdram_enable(ctrl->d0f3,
			     (u8 *)(pci_read_config8(ctrl->d0f3, 0x40) << 26));
	sdram_set_post(ctrl);
}

Example #12

File: romstage.c Project: 0ida/coreboot

void main(unsigned long bist)
{
	/* Set southbridge and Super I/O GPIOs. */
	mb_gpio_init();

	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
	console_init();

	report_bist_failure(bist);
	enable_smbus();
	dump_spd_registers();
	sdram_set_registers();
	sdram_set_spd_registers();
	sdram_enable();
}

Example #13

File: romstage.c Project: 0ida/coreboot

static void main(unsigned long bist)
{
	if (bist == 0)
		early_mtrr_init();

	enable_vt8231_serial();
	console_init();

	/* Halt if there was a built in self test failure */
	report_bist_failure(bist);

	vt8231_enable_rom();
	enable_mainboard_devices();
	enable_smbus();
	enable_shadow_ram();

	/*
	  this is way more generic than we need.
	  sdram_initialize(ARRAY_SIZE(cpu), cpu);
	*/
	sdram_set_registers((const struct mem_controller *) 0);
	sdram_set_spd_registers((const struct mem_controller *) 0);
	sdram_enable(0, (const struct mem_controller *) 0);
}