Example #1
0
/**
 ****************************************************************************************
 * @brief Initialisation of ble core, pwr and clk
 *
 * The Hclk and Pclk are set
 ****************************************************************************************
 */
void init_pwr_and_clk_ble(void) 
{
    SetBits16(CLK_RADIO_REG, BLE_DIV, 0);
    SetBits16(CLK_RADIO_REG, BLE_ENABLE, 1); 
    SetBits16(CLK_RADIO_REG, RFCU_DIV, 1);
    SetBits16(CLK_RADIO_REG, RFCU_ENABLE, 1);

    /* 
     * Power up BLE core & reset BLE Timers
    */
    SetBits16(CLK_32K_REG,  RC32K_ENABLE, 1);  
    SetBits16(SYS_CTRL_REG, CLK32_SOURCE, 0);  
    SetBits16(CLK_RADIO_REG, BLE_LP_RESET, 1);  
    SetBits16(PMU_CTRL_REG, RADIO_SLEEP, 0);
    while (!(GetWord16(SYS_STAT_REG) & RAD_IS_UP)); // Just wait for radio to truely wake up
                                
    select_lp_clk();

    if ( ((lp_clk_sel == LP_CLK_XTAL32) && (CFG_LP_CLK == LP_CLK_FROM_OTP)) || (CFG_LP_CLK == LP_CLK_XTAL32) )
    {
        SetBits16(CLK_32K_REG, XTAL32K_ENABLE, 1);  // Enable XTAL32KHz 

        // Disable XTAL32 amplitude regulation in BOOST mode
        if (GetBits16(ANA_STATUS_REG, BOOST_SELECTED) == 0x1) 
            SetBits16(CLK_32K_REG,  XTAL32K_DISABLE_AMPREG, 1);  
        else
            SetBits16(CLK_32K_REG,  XTAL32K_DISABLE_AMPREG, 0);  
        SetBits16(CLK_32K_REG,  XTAL32K_CUR, 5);
        SetBits16(CLK_32K_REG,  XTAL32K_RBIAS, 3);
        SetBits16(SYS_CTRL_REG, CLK32_SOURCE, 1);  // Select XTAL32K as LP clock
        
     }
    else if ( ((lp_clk_sel == LP_CLK_RCX20) && (CFG_LP_CLK == LP_CLK_FROM_OTP)) || (CFG_LP_CLK == LP_CLK_RCX20) )
    {
        SetBits16(CLK_RCX20K_REG, RCX20K_NTC, 0xB);      
        SetBits16(CLK_RCX20K_REG, RCX20K_BIAS, 1);
        SetBits16(CLK_RCX20K_REG, RCX20K_TRIM, 0);
        SetBits16(CLK_RCX20K_REG, RCX20K_LOWF, 1);
                           
        SetBits16(CLK_RCX20K_REG, RCX20K_ENABLE, 1);
    
        SetBits16(CLK_RCX20K_REG, RCX20K_SELECT, 1);
    
        SetBits16(SYS_CTRL_REG, CLK32_SOURCE, 0);                                               

        SetBits16(CLK_32K_REG, XTAL32K_ENABLE, 0); // Disable Xtal32KHz
    }
    else
        ASSERT_WARNING(0);
    
    SetBits16(CLK_32K_REG,  RC32K_ENABLE, 0);   // Disable RC32KHz
                                
    SetBits16(CLK_RADIO_REG, BLE_LP_RESET, 0);
    
    if (GetBits16(ANA_STATUS_REG, BOOST_SELECTED) == 0x1) 
        SetWord16(DCDC_CTRL3_REG, 0x5);
    
    /* 
     * Just make sure that BLE core is stopped (if already running)
     */
    SetBits32(BLE_RWBTLECNTL_REG, RWBLE_EN, 0); 
 
    /* 
     * Since BLE is stopped (and powered), set CLK_SEL
     */    
    SetBits32(BLE_CNTL2_REG, BLE_CLK_SEL, 16);
    SetBits32(BLE_CNTL2_REG, BLE_RSSI_SEL, 1);    
}
Example #2
0
/**
 ****************************************************************************************
 * @brief Initialisation of ble core, pwr and clk
 *
 * The Hclk and Pclk are set
 ****************************************************************************************
 */
void init_pwr_and_clk_ble(void) 
{

    
    SetBits16(CLK_RADIO_REG, BLE_DIV, 0);
    SetBits16(CLK_RADIO_REG, BLE_ENABLE, 1); 
    SetBits16(CLK_RADIO_REG, RFCU_DIV, 1);
    SetBits16(CLK_RADIO_REG, RFCU_ENABLE, 1);

    /* 
     * Power up BLE core & reset BLE Timers
    */
    SetBits16(CLK_32K_REG,  RC32K_ENABLE, 1);  
    SetBits16(SYS_CTRL_REG, CLK32_SOURCE, 0);  
    SetBits16(CLK_RADIO_REG, BLE_LP_RESET, 1);  
    SetBits16(PMU_CTRL_REG, RADIO_SLEEP, 0);
    while (!(GetWord16(SYS_STAT_REG) & RAD_IS_UP)); // Just wait for radio to truely wake up
                                
    select_lp_clk();   
    if (lp_clk_sel == LP_CLK_XTAL32)
    {
        SetBits16(CLK_32K_REG, XTAL32K_ENABLE, 1);  // Enable XTAL32KHz 

        // Disable XTAL32 amplitude regulation in BOOST mode
        if (GetBits16(ANA_STATUS_REG, BOOST_SELECTED) == 0x1) 
            SetBits16(CLK_32K_REG,  XTAL32K_DISABLE_AMPREG, 1);  
        else
            SetBits16(CLK_32K_REG,  XTAL32K_DISABLE_AMPREG, 0);  
        SetBits16(CLK_32K_REG,  XTAL32K_CUR, 5);
        SetBits16(CLK_32K_REG,  XTAL32K_RBIAS, 3);
        SetBits16(SYS_CTRL_REG, CLK32_SOURCE, 1);  // Select XTAL32K as LP clock
        
     }
    else if (lp_clk_sel == LP_CLK_RCX20)
    {
        SetBits16(CLK_RCX20K_REG, RCX20K_NTC, 0xB);      
        SetBits16(CLK_RCX20K_REG, RCX20K_BIAS, 1);
        SetBits16(CLK_RCX20K_REG, RCX20K_TRIM, 0);
        SetBits16(CLK_RCX20K_REG, RCX20K_LOWF, 1);
                           
        SetBits16(CLK_RCX20K_REG, RCX20K_ENABLE, 1);
    
        SetBits16(CLK_RCX20K_REG, RCX20K_SELECT, 1);
    
        SetBits16(SYS_CTRL_REG, CLK32_SOURCE, 0);                                               
    }
    SetBits16(CLK_32K_REG,  RC32K_ENABLE, 0);   // Disable RC32KHz
                                
    SetBits16(CLK_RADIO_REG, BLE_LP_RESET, 0);
    
    if (GetBits16(ANA_STATUS_REG, BOOST_SELECTED) == 0x1) 
        SetWord16(DCDC_CTRL3_REG, 0x5);
    
    /* 
     * Just make sure that BLE core is stopped (if already running)
     */
    SetBits32(BLE_RWBTLECNTL_REG, RWBLE_EN, 0); 
 
    /* 
     * Since BLE is stopped (and powered), set CLK_SEL
     */    
    SetBits32(BLE_CNTL2_REG, BLE_CLK_SEL, 16);
    SetBits32(BLE_CNTL2_REG, BLE_RSSI_SEL, 1);    

    /* 
     * Set spi interface to software
     */   
#ifdef FPGA_USED     
    // the following 2 lines are for FPGA implementation
    SetBits32(BLE_CNTL2_REG, SW_RPL_SPI, 0);
    SetBits32(BLE_CNTL2_REG, BB_ONLY, 1);     
#endif    
}