static void
wd76c10_write(uint16_t port, uint16_t val, void *priv)
{
switch (port)
{
case 0x0092:
wd76c10_0092 = val;
mem_a20_alt = val & 2;
mem_a20_recalc();
break;
case 0x2072:
wd76c10_2072 = val;
serial_remove(wd76c10_uart[0]);
if (!(val & 0x10))
{
switch ((val >> 5) & 7)
{
case 1: serial_setup(wd76c10_uart[0], 0x3f8, 4); break;
case 2: serial_setup(wd76c10_uart[0], 0x2f8, 4); break;
case 3: serial_setup(wd76c10_uart[0], 0x3e8, 4); break;
case 4: serial_setup(wd76c10_uart[0], 0x2e8, 4); break;
default: break;
}
}
serial_remove(wd76c10_uart[1]);
if (!(val & 0x01))
{
switch ((val >> 1) & 7)
{
case 1: serial_setup(wd76c10_uart[1], 0x3f8, 3); break;
case 2: serial_setup(wd76c10_uart[1], 0x2f8, 3); break;
case 3: serial_setup(wd76c10_uart[1], 0x3e8, 3); break;
case 4: serial_setup(wd76c10_uart[1], 0x2e8, 3); break;
default: break;
}
}
break;
case 0x2872:
wd76c10_2872 = val;
fdc_remove(wd76c10_fdc);
if (!(val & 1))
fdc_set_base(wd76c10_fdc, 0x03f0);
break;
case 0x5872:
wd76c10_5872 = val;
break;
}
}
static void serial_detach(dev_link_t * link)
{
struct serial_info *info = link->priv;
dev_link_t **linkp;
int ret;
DEBUG(0, "serial_detach(0x%p)\n", link);
/* Locate device structure */
for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
if (*linkp == link)
break;
if (*linkp == NULL)
return;
/*
* Ensure any outstanding scheduled tasks are completed.
*/
flush_scheduled_work();
/*
* Ensure that the ports have been released.
*/
serial_remove(link);
if (link->handle) {
ret = pcmcia_deregister_client(link->handle);
if (ret != CS_SUCCESS)
cs_error(link->handle, DeregisterClient, ret);
}
/* Unlink device structure, free bits */
*linkp = link->next;
kfree(info);
}
static void
sis_85c471_write(uint16_t port, uint8_t val, void *priv)
{
sis_85c471_t *dev = (sis_85c471_t *) priv;
uint8_t index = (port & 1) ? 0 : 1;
uint8_t valxor;
if (index) {
if ((val >= 0x50) && (val <= 0x76))
dev->cur_reg = val;
return;
} else {
if ((dev->cur_reg < 0x50) || (dev->cur_reg > 0x76))
return;
valxor = val ^ dev->regs[dev->cur_reg - 0x50];
/* Writes to 0x52 are blocked as otherwise, large hard disks don't read correctly. */
if (dev->cur_reg != 0x52)
dev->regs[dev->cur_reg - 0x50] = val;
}
switch(dev->cur_reg) {
case 0x73:
if (valxor & 0x40) {
ide_pri_disable();
if (val & 0x40)
ide_pri_enable();
}
if (valxor & 0x20) {
serial_remove(dev->uart[0]);
serial_remove(dev->uart[1]);
if (val & 0x20) {
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[0], SERIAL2_ADDR, SERIAL2_IRQ);
}
}
if (valxor & 0x10) {
lpt1_remove();
if (val & 0x10)
lpt1_init(0x378);
}
break;
}
dev->cur_reg = 0;
}
static void serial_detach(struct pcmcia_device *link)
{
struct serial_info *info = link->priv;
DEBUG(0, "serial_detach(0x%p)\n", link);
/*
* Ensure any outstanding scheduled tasks are completed.
*/
flush_scheduled_work();
/*
* Ensure that the ports have been released.
*/
serial_remove(link);
/* free bits */
kfree(info);
}
static void port_remove(struct btd_device *device)
{
return serial_remove(device);
}
