/*
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
static void exynos5_init_dev(struct s5p_uart *uart)
{
/* enable FIFOs */
writel(0x1, &uart->ufcon);
writel(0, &uart->umcon);
/* 8N1 */
writel(0x3, &uart->ulcon);
/* No interrupts, no DMA, pure polling */
writel(0x245, &uart->ucon);
serial_setbrg_dev(uart);
}
/*
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
static void exynos5_init_dev(struct s5p_uart *uart)
{
// TODO initialize with correct peripheral id by base_port.
exynos_pinmux_uart3();
/* enable FIFOs */
writel(0x1, &uart->ufcon);
writel(0, &uart->umcon);
/* 8N1 */
writel(0x3, &uart->ulcon);
/* No interrupts, no DMA, pure polling */
writel(0x245, &uart->ucon);
serial_setbrg_dev(uart);
}
/*
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
/* reset and enable FIFOs, set triggers to the maximum */
writel(0, &uart->ufcon);
writel(0, &uart->umcon);
/* 8N1 */
writel(0x3, &uart->ulcon);
/* No interrupts, no DMA, pure polling */
writel(0x245, &uart->ucon);
serial_setbrg_dev(dev_index);
return 0;
}
int serial_init_dev(unsigned int idx)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
#if defined(CONFIG_SERIAL_MULTI)
u32 reg;
reg = in_be32(&im->clk.sccr[0]);
out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
#endif
fifo_init (psc);
/* set MR register to point to MR1 */
out_8(&psc->command, PSC_SEL_MODE_REG_1);
/* disable Tx/Rx */
out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE);
/* choose the prescaler by 16 for the Tx/Rx clock generation */
out_be16(&psc->psc_clock_select, 0xdd00);
/* switch to UART mode */
out_be32(&psc->sicr, 0);
/* mode register points to mr1 */
/* configure parity, bit length and so on in mode register 1*/
out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
/* now, mode register points to mr2 */
out_8(&psc->mode, PSC_MODE_1_STOPBIT);
/* set baudrate */
serial_setbrg_dev(idx);
/* disable all interrupts */
out_be16(&psc->psc_imr, 0);
/* reset and enable Rx/Tx */
out_8(&psc->command, PSC_RST_RX);
out_8(&psc->command, PSC_RST_TX);
out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
return 0;
}
void serial_setbrg(void)
{
serial_setbrg_dev(CONFIG_PSC_CONSOLE);
}
void serial1_setbrg(void)
{
serial_setbrg_dev(PSC_BASE2);
}
void serial0_setbrg (void)
{
serial_setbrg_dev(PSC_BASE);
}
void serial_setbrg(void)
{
serial_setbrg_dev(ACTING_UART0_BASE);
}
void serial1_setbrg (void)
{
serial_setbrg_dev(UART1_BASE);
}
void serial0_setbrg (void)
{
serial_setbrg_dev(UART0_BASE);
}
