void Mapper_Fme07::write_register( int index, int data )
{
	regs [index] = data;
	int prg_bank = index - 0x09;
	if ( (unsigned) prg_bank < 3 ) // most common
	{
		set_prg_bank( 0x8000 | (prg_bank << bank_8k), bank_8k, data );
	}
	else if ( index == 0x08 )
	{
		enable_sram( (data & 0xC0) == 0xC0 );
		if ( !(data & 0xC0) )
			set_prg_bank( 0x6000, bank_8k, data & 0x3F );
	}
	else if ( index < 0x08 )
	{
		set_chr_bank( index * 0x400, bank_1k, data );
	}
	else
	{
		if ( data & 2 )
			mirror_single( data & 1 );
		else if ( data & 1 )
			mirror_horiz();
		else
			mirror_vert();
	}
}
Example #2
0
	virtual void apply_mapping()
	{
		set_prg_bank ( 0x8000, bank_16k, game_sel );
		set_prg_bank ( 0xC000, bank_16k, game_sel );
		set_chr_bank ( 0, bank_8k, game_sel );
		last_game = game_sel;
	}
	virtual void write( nes_time_t, nes_addr_t addr, int data )
	{
		regs = handle_bus_conflict( addr, data );

		set_chr_bank( 0x0000, bank_8k, data & 0x0F );
		set_prg_bank( 0x8000, bank_16k, ( data >> 4 ) & 0x07 );
	}
Example #4
0
// Sets mirroring, maps first 8K CHR in, first and last 16K of PRG,
// intercepts writes to upper half of memory, and clears registered state.
void Nes_Mapper::default_reset_state()
{
	int mirroring = cart_->mirroring();
	if ( mirroring & 8 )
		mirror_full();
	else if ( mirroring & 1 )
		mirror_vert();
	else
		mirror_horiz();
	
	set_chr_bank( 0, bank_8k, 0 );
	
	set_prg_bank( 0x8000, bank_16k, 0 );
	set_prg_bank( 0xC000, bank_16k, last_bank );
	
	intercept_writes( 0x8000, 0x8000 );
	
	memset( state, 0, state_size );
}