Example #1
0
int main()
{	
	// no se usa idtr, el bootloader de Pure ya lo setea en 0x0 y usa ese



	set_idt_entry(0x20, 0x08, (uint64_t)&_irq00Handler, 0x8E);    
	set_idt_entry (0x21, 0x08, (uint64_t)&_irq01Handler, 0x8E );
	//Chequiar bootloader (idt)
	


	//Todas las interrupciones habilitadas.
	picMasterMask(0xFC);
	picSlaveMask(0xFF);
        
	_sti();
	

	ncPrint("[Finished]");
	ncNewline();

	while (1) {

	}

	return 0;
}
Example #2
0
void handle_irq(unsigned vec, void (*func)(isr_regs_t *regs))
{
    u8 *thunk = vmalloc(50);

    set_idt_entry(vec, thunk, 0);

#ifdef __x86_64__
    /* sub $8, %rsp */
    *thunk++ = 0x48; *thunk++ = 0x83; *thunk++ = 0xec; *thunk++ = 0x08;
    /* mov $func_low, %(rsp) */
    *thunk++ = 0xc7; *thunk++ = 0x04; *thunk++ = 0x24;
    *(u32 *)thunk = (ulong)func; thunk += 4;
    /* mov $func_high, %(rsp+4) */
    *thunk++ = 0xc7; *thunk++ = 0x44; *thunk++ = 0x24; *thunk++ = 0x04;
    *(u32 *)thunk = (ulong)func >> 32; thunk += 4;
    /* jmp isr_entry_point */
    *thunk ++ = 0xe9;
    *(u32 *)thunk = (ulong)isr_entry_point - (ulong)(thunk + 4);
#else
    /* push $func */
    *thunk++ = 0x68;
    *(u32 *)thunk = (ulong)func; thunk += 4;
    /* jmp isr_entry_point */
    *thunk++ = 0xe9;
    *(u32 *)thunk = (ulong)isr_entry_point - (ulong)(thunk + 4);
#endif
}
Example #3
0
void init_ata(t_device_desc* device_desc)
{	
	struct t_i_desc i_desc;
	
	i_desc.baseLow=((int)&int_handler_ata) & 0xFFFF;
	i_desc.selector=0x8;
	i_desc.flags=0x0EF00;
	i_desc.baseHi=((int)&int_handler_ata)>>0x10;
	set_idt_entry(0x2E,&i_desc);
	device_desc->pending_request=new_dllist();
	device_desc->read=_read_28_ata;
	device_desc->write=_write_28_ata;
	device_desc->status=REQUEST_COMPLETED;
}
Example #4
0
File: ata.c Project: giumaug/g-os
void init_ata(t_device_desc* device_desc)
{
    struct t_i_desc i_desc;

    i_desc.baseLow=((int)&int_handler_ata) & 0xFFFF;
    i_desc.selector=0x8;
    i_desc.flags=0x08e00;
    i_desc.baseHi=((int)&int_handler_ata)>>0x10;
    set_idt_entry(0x2E,&i_desc);
    device_desc->read=_read_28_ata;
    device_desc->write=_write_28_ata;
    device_desc->p_read=_p_read_28_ata;
    device_desc->p_write=_p_write_28_ata;
    device_desc->status=DEVICE_IDLE;
    sem_init(&device_desc->mutex,1);
    sem_init(&device_desc->sem,0);
}
Example #5
0
/*
** Name:	init_idt
**
** Description: Initialize the Interrupt Descriptor Table (IDT).  This
**		makes each of the entries in the IDT point to the isr stub
**		for that entry, and installs a default handler in the
**		handler table.  Specific handlers are then installed for
**		those interrupts we may get before a real handler is set up.
*/
static void init_idt( void ){
	int i;
	extern	void	( *__isr_stub_table[ 256 ] )( void );

	/*
	** Make each IDT entry point to the stub for that vector.
	** Also make each entry in the ISR table point to the default handler.
	*/
	for ( i=0; i < 256; i++ ){
		set_idt_entry( i, __isr_stub_table[ i ] );
		__install_isr( i, __default_unexpected_handler );
	}

	/*
	** Install the handlers for interrupts that have a specific handler.
	*/
	__install_isr( INT_VEC_KEYBOARD, __default_expected_handler );
	__install_isr( INT_VEC_TIMER,    __default_expected_handler );
	__install_isr( INT_VEC_MYSTERY,  __default_mystery_handler );
}
Example #6
0
void reset_idt() {
		memset(idt, 0, sizeof(IDTDescr)*256);
		//The base of the table must be a linear address (which is 
		//currently the same as the physical address)
		idt_struct.base = (uint32_t)idt-KERNBASE;
		idt_struct.limit = 256*(sizeof(IDTDescr)-1);
		idtp = &idt_struct;		
		phys_idtp = (IDT*)(((uint32_t)idtp) - KERNBASE);
		_kern_print("IDTP: %x PHYS_IDTP %x\n", ((uint32_t)idtp), ((uint32_t)phys_idtp));
		//Set default exception handlers.  There's no compelling reason
		//to change them, but kernel code can by making its own
		//set_idt_entry calls.
		set_idt_entry(0, isr_0, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(1,isr_1, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(2,isr_2, INTERRUPT_GATE_TYPE_ATTR);
		set_idt_entry(3,isr_3, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(4,isr_4, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(5,isr_5, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(6,isr_6, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(7,isr_7, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(8,isr_8, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(9,isr_9, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(10,isr_10, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(11,isr_11, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(12,isr_12, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(13,isr_13, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(14,isr_14, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(16,isr_16, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(17,isr_17, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(18,isr_18, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(19,isr_19, TRAP_GATE_TYPE_ATTR);
		set_idt_entry(30,isr_30, TRAP_GATE_TYPE_ATTR);

}
Example #7
0
// Initialize and load the IDT.
void setup_idt (void)
{
    idt_ptr.size = (sizeof (idt_entry) * 256) - 1;
    idt_ptr.address = (uint32_t) &idt;

    set_idt_entry (0, (uint32_t) &exc0);
    set_idt_entry (1, (uint32_t) &exc1);
    set_idt_entry (2, (uint32_t) &exc2);
    set_idt_entry (3, (uint32_t) &exc3);
    set_idt_entry (4, (uint32_t) &exc4);
    set_idt_entry (5, (uint32_t) &exc5);
    set_idt_entry (6, (uint32_t) &exc6);
    set_idt_entry (7, (uint32_t) &exc7);
    set_idt_entry (8, (uint32_t) &exc8);
    set_idt_entry (9, (uint32_t) &exc9);
    set_idt_entry (10, (uint32_t) &exc10);
    set_idt_entry (11, (uint32_t) &exc11);
    set_idt_entry (12, (uint32_t) &exc12);
    set_idt_entry (13, (uint32_t) &exc13);
    set_idt_entry (14, (uint32_t) &exc14);
    set_idt_entry (15, (uint32_t) &exc15);
    set_idt_entry (16, (uint32_t) &exc16);
    set_idt_entry (17, (uint32_t) &exc17);
    set_idt_entry (18, (uint32_t) &exc18);
    set_idt_entry (19, (uint32_t) &exc19);
    set_idt_entry (20, (uint32_t) &exc20);
    set_idt_entry (21, (uint32_t) &exc21);
    set_idt_entry (22, (uint32_t) &exc22);
    set_idt_entry (23, (uint32_t) &exc23);
    set_idt_entry (24, (uint32_t) &exc24);
    set_idt_entry (25, (uint32_t) &exc25);
    set_idt_entry (26, (uint32_t) &exc26);
    set_idt_entry (27, (uint32_t) &exc27);
    set_idt_entry (28, (uint32_t) &exc28);
    set_idt_entry (29, (uint32_t) &exc29);
    set_idt_entry (30, (uint32_t) &exc30);
    set_idt_entry (31, (uint32_t) &exc31);

    remap_pics ();
    set_idt_entry (32, (uint32_t) &irq0);
    set_idt_entry (33, (uint32_t) &irq1);
    set_idt_entry (34, (uint32_t) &irq2);
    set_idt_entry (35, (uint32_t) &irq3);
    set_idt_entry (36, (uint32_t) &irq4);
    set_idt_entry (37, (uint32_t) &irq5);
    set_idt_entry (38, (uint32_t) &irq6);
    set_idt_entry (39, (uint32_t) &irq7);
    set_idt_entry (40, (uint32_t) &irq8);
    set_idt_entry (41, (uint32_t) &irq9);
    set_idt_entry (42, (uint32_t) &irq10);
    set_idt_entry (43, (uint32_t) &irq11);
    set_idt_entry (44, (uint32_t) &irq12);
    set_idt_entry (45, (uint32_t) &irq13);
    set_idt_entry (46, (uint32_t) &irq14);
    set_idt_entry (47, (uint32_t) &irq15);

    load_idt ();
}
Example #8
0
void install_idt()
{
  idtp.limit=(sizeof(struct idt_entry)* 47)-1; /* 255 ISRs */
  idtp.base=(unsigned int)&idt;

  
  remap_pics(0x20,0x28); /* remap interrups to;
			    master pic interrups -> 0x20 (32)
			    slave pic interrupts -> 0x28 (40)
			 */

  /* assing handlers to interrups & exceptions */
  set_idt_entry(0 ,(unsigned long)&isr0,0x08 , 0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(1 ,(unsigned long)&isr1,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(2 ,(unsigned long)&isr2,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(3 ,(unsigned long)&isr3,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(4 ,(unsigned long)&isr4,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(5 ,(unsigned long)&isr5,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(6 ,(unsigned long)&isr6,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(7 ,(unsigned long)&isr7,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(8 ,(unsigned long)&isr8,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(9 ,(unsigned long)&isr9,0x08 ,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(10,(unsigned long)&isr10,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(11,(unsigned long)&isr11,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(12,(unsigned long)&isr12,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(13,(unsigned long)&isr13,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(14,(unsigned long)&isr14,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(15,(unsigned long)&isr15,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(16,(unsigned long)&isr16,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(17,(unsigned long)&isr17,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(18,(unsigned long)&isr18,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(19,(unsigned long)&isr19,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(20,(unsigned long)&isr20,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(21,(unsigned long)&isr21,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(22,(unsigned long)&isr22,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(23,(unsigned long)&isr23,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(24,(unsigned long)&isr24,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(25,(unsigned long)&isr25,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(26,(unsigned long)&isr26,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(27,(unsigned long)&isr27,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(28,(unsigned long)&isr28,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(29,(unsigned long)&isr29,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(30,(unsigned long)&isr30,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  set_idt_entry(31,(unsigned long)&isr31,0x08,  0xF | PRESENT | KERNEL_LEVEL);
  
  
  /* hardware IRQ handlers */
  set_idt_entry(32,(unsigned long)&IRQ0,0x08, 0xF | PRESENT | KERNEL_LEVEL);  // timer IRQ
  set_idt_entry(33,(unsigned long)&IRQ1,0x08, 0xF | PRESENT | KERNEL_LEVEL);   // keyboard IRQ
  set_idt_entry(34,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(35,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(36,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(37,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(38,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(39,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(40,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(41,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(42,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(43,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(44,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(45,(unsigned long)&IRQ_NOT_IMPLEMENTED,0x08, 0xF | NOT_PRESENT | KERNEL_LEVEL);
  set_idt_entry(46,(unsigned long)&IRQ14,0x08, 0xF | PRESENT | KERNEL_LEVEL); // ata-0 handler
  set_idt_entry(47,(unsigned long)&IRQ15,0x08, 0xF | PRESENT | KERNEL_LEVEL); // ata-1 handler

  load_idt();
}