/*
* Start secondary processors in motion.
*/
void
cpu_boot_secondary_processors()
{
int i, pstate;
struct cpu_info *ci;
sparc64_ipi_init();
for (ci = cpus; ci != NULL; ci = ci->ci_next) {
if (ci->ci_cpuid == CPU_UPAID)
continue;
cpu_pmap_prepare(ci, false);
cpu_args->cb_node = ci->ci_node;
cpu_args->cb_cpuinfo = ci->ci_paddr;
membar_sync();
/* Disable interrupts and start another CPU. */
pstate = getpstate();
setpstate(PSTATE_KERN);
prom_startcpu(ci->ci_node, (void *)cpu_spinup_trampoline, 0);
for (i = 0; i < 2000; i++) {
membar_sync();
if (CPUSET_HAS(cpus_active, ci->ci_index))
break;
delay(10000);
}
setpstate(pstate);
if (!CPUSET_HAS(cpus_active, ci->ci_index))
printf("cpu%d: startup failed\n", ci->ci_cpuid);
}
}
/*
* Determine mass storage and memory configuration for a machine.
* We get the PROM's root device and make sure we understand it, then
* attach it as `mainbus0'. We also set up to handle the PROM `sync'
* command.
*/
void
cpu_configure(void)
{
if (CPU_ISSUN4V)
mdesc_init();
bool userconf = (boothowto & RB_USERCONF) != 0;
/* fetch boot device settings */
get_bootpath_from_prom();
if (((boothowto & RB_USERCONF) != 0) && !userconf)
/*
* Old bootloaders do not pass boothowto, and MI code
* has already handled userconfig before we get here
* and finally fetch the right options. So if we missed
* it, just do it here.
*/
userconf_prompt();
/* block clock interrupts and anything below */
splclock();
/* Enable device interrupts */
setpstate(getpstate()|PSTATE_IE);
if (config_rootfound("mainbus", NULL) == NULL)
panic("mainbus not configured");
/* Enable device interrupts */
setpstate(getpstate()|PSTATE_IE);
(void)spl0();
}
/*
* Start secondary processors in motion.
*/
void
cpu_boot_secondary_processors(void)
{
int i, pstate;
struct cpu_info *ci;
sync_tick = 0;
sparc64_ipi_init();
if (boothowto & RB_MD1) {
cpus[0].ci_next = NULL;
sparc_ncpus = ncpu = ncpuonline = 1;
return;
}
for (ci = cpus; ci != NULL; ci = ci->ci_next) {
if (ci->ci_cpuid == CPU_UPAID)
continue;
cpu_pmap_prepare(ci, false);
cpu_args->cb_node = ci->ci_node;
cpu_args->cb_cpuinfo = ci->ci_paddr;
membar_Sync();
/* Disable interrupts and start another CPU. */
pstate = getpstate();
setpstate(PSTATE_KERN);
prom_startcpu(ci->ci_node, (void *)cpu_spinup_trampoline, 0);
for (i = 0; i < 2000; i++) {
membar_Sync();
if (CPUSET_HAS(cpus_active, ci->ci_index))
break;
delay(10000);
}
/* synchronize %tick ( to some degree at least ) */
delay(1000);
sync_tick = 1;
membar_Sync();
settick(0);
if (ci->ci_system_clockrate[0] != 0)
setstick(0);
setpstate(pstate);
if (!CPUSET_HAS(cpus_active, ci->ci_index))
printf("cpu%d: startup failed\n", ci->ci_cpuid);
}
}
/*
* Determine mass storage and memory configuration for a machine.
* We get the PROM's root device and make sure we understand it, then
* attach it as `mainbus0'. We also set up to handle the PROM `sync'
* command.
*/
void
cpu_configure(void)
{
/* fetch boot device settings */
get_bootpath_from_prom();
/* block clock interrupts and anything below */
splclock();
/* Enable device interrupts */
setpstate(getpstate()|PSTATE_IE);
if (config_rootfound("mainbus", NULL) == NULL)
panic("mainbus not configured");
/* Enable device interrupts */
setpstate(getpstate()|PSTATE_IE);
(void)spl0();
}
