void fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, unsigned int map, int nr_bytes, address_word addr, transfer_type transfer, sim_core_signals sig) { #if 0 if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) { h_bsm_set (current_cpu, h_sm_get (current_cpu)); h_bie_set (current_cpu, h_ie_get (current_cpu)); h_bcond_set (current_cpu, h_cond_get (current_cpu)); /* sm not changed */ h_ie_set (current_cpu, 0); h_cond_set (current_cpu, 0); h_bpc_set (current_cpu, cia); sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, EIT_ADDR_EXCP_ADDR); } else #endif sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, transfer, sig); }
void frv_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, unsigned int map, int nr_bytes, address_word addr, transfer_type transfer, sim_core_signals sig) { if (sig == sim_core_unaligned_signal) { if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400 || STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr450) frv_queue_data_access_error_interrupt (current_cpu, addr); else frv_queue_mem_address_not_aligned_interrupt (current_cpu, addr); } frv_term (sd); sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, transfer, sig); }
void m32r_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, unsigned int map, int nr_bytes, address_word addr, transfer_type transfer, sim_core_signals sig) { if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) { m32rbf_h_cr_set (current_cpu, H_CR_BBPC, m32rbf_h_cr_get (current_cpu, H_CR_BPC)); switch (MACH_NUM (CPU_MACH (current_cpu))) { case MACH_M32R: m32rbf_h_bpsw_set (current_cpu, m32rbf_h_psw_get (current_cpu)); /* sm not changed. */ m32rbf_h_psw_set (current_cpu, m32rbf_h_psw_get (current_cpu) & 0x80); break; case MACH_M32RX: m32rxf_h_bpsw_set (current_cpu, m32rxf_h_psw_get (current_cpu)); /* sm not changed. */ m32rxf_h_psw_set (current_cpu, m32rxf_h_psw_get (current_cpu) & 0x80); break; case MACH_M32R2: m32r2f_h_bpsw_set (current_cpu, m32r2f_h_psw_get (current_cpu)); /* sm not changed. */ m32r2f_h_psw_set (current_cpu, m32r2f_h_psw_get (current_cpu) & 0x80); break; default: abort (); } m32rbf_h_cr_set (current_cpu, H_CR_BPC, cia); sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, EIT_ADDR_EXCP_ADDR); } else sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, transfer, sig); }