static void run_benchmark(coreid_t core, int requests) { errval_t err; struct capref ramcap; int i = -1; int bits = MEM_BITS; debug_printf("starting benchmark. allocating mem of size: %d\n", bits); //debug_printf("starting benchmark. allocating mem of size: %d to %d\n", // MINSIZEBITS, MINSIZEBITS+requests-1); sleep_init(); do { i++; // bits = MINSIZEBITS+i; trace_event(TRACE_SUBSYS_MEMTEST, TRACE_EVENT_MEMTEST_ALLOC, i); err = ram_alloc(&ramcap, bits); // milli_sleep(1); /* if ((i % 500 == 0) && (i > 0)) { debug_printf("allocated %d caps\n", i); } */ } while (err_is_ok(err)); // && (i < requests)); debug_printf("done benchmark. allocated %d caps (%lu bytes)\n", i, i * (1UL << bits)); }
int main(void) { // initialise MCU avr_init(); // turn on the red status led ASAP to show boot process avr_set_bit(PORTD, STATUS_LED); // we're using the XBee module, connected to the UART serial_init(); // turn off the red status led ASAP to show boot process has ended avr_clear_bit(PORTD, STATUS_LED); // prepare for using sleep_ms sleep_init(); // the endless loop while(TRUE) { // show we're awake avr_set_bit(PORTC, STATUS_LED); // visually printf( "Awake for 1 second ...\n"); // remotely _delay_ms(1000); printf( "Going to sleep for 10 seconds...\n"); avr_clear_bit(PORTC, STATUS_LED); sleep_ms(10000L); } return(0); }
int main(void) { init(); nSensors = search_sensors(); sleep_init(); while (1) { if (display_flag) { convert_show(); display_flag = 0; } sleep_cpu(); sleep_disable(); } }
void monitor_init(HMODULE module_handle) { // Sends crashes to the process rather than showing error popup boxes etc. SetErrorMode(SEM_FAILCRITICALERRORS | SEM_NOALIGNMENTFAULTEXCEPT | SEM_NOGPFAULTERRORBOX | SEM_NOOPENFILEERRORBOX); config_t cfg; config_read(&cfg); // Required to be initialized before any logging starts. mem_init(); // Initialize capstone without our custom allocator as it is // not available yet. hook_init(module_handle); pipe_init(cfg.pipe_name); native_init(); // Re-initialize capstone with our custom allocator which is now // accessible after native_init(). hook_init2(); misc_init(module_handle, cfg.shutdown_mutex); misc_set_hook_library(&monitor_hook); diffing_init(cfg.hashes_path, cfg.diffing_enable); log_init(cfg.logpipe); ignore_init(); sleep_init(cfg.first_process, cfg.force_sleep_skip, cfg.startup_time); unhook_init_detection(cfg.first_process); hide_module_from_peb(module_handle); symbol_init(module_handle); // Should be the last as some of the other initialization routines extract // the image size, EAT pointers, etc while the PE header is still intact. destroy_pe_header(module_handle); misc_set_monitor_options(cfg.track, cfg.mode); }
int main(int argc, char **argv) { coreid_t *cores; int core_count; int c_idx; uint8_t memory; int payloadsz = 64; int nocache = 0; int read_incoming = 0; int head_idx_wb = 1; errval_t err; sleep_init(); // Connect to SKB to get info err = skb_client_connect(); assert(err_is_ok(err)); // Get information about available cores get_cores_skb(&cores, &core_count); printf("Net latency benchmark start\n"); printf("%%\"core\",\"memory\",\"payload\",\"nocache\",\"touch\",\"hiwb\"," "\"rtt\",\"time\"\n"); for (c_idx = 0; c_idx < core_count; c_idx++) { for (memory = 0; memory < 16; memory += 4) { for (payloadsz = 64; payloadsz < 1500; payloadsz *= 4) { for (nocache = 0; nocache <= 1; nocache++) { for (read_incoming = 0; read_incoming <= 1; read_incoming++) { for (head_idx_wb = 0; head_idx_wb <= 1; head_idx_wb++) { start_run(cores[c_idx], memory, payloadsz, nocache, read_incoming, head_idx_wb); } } } } } } printf("Net latency benchmark done\n"); return 0; }
static void run_benchmark(coreid_t core, int requests) { errval_t err; struct capref ramcap; int i = -1; int bits = MEM_BITS; debug_printf("starting benchmark. allocating mem of size: %d\n", bits); //debug_printf("starting benchmark. allocating mem of size: %d to %d\n", // MINSIZEBITS, MINSIZEBITS+requests-1); sleep_init(); // NOTE: because this is allocating and freeing, it should never stop. // it should also never have to steal do { i++; // bits = MINSIZEBITS+i; trace_event(TRACE_SUBSYS_MEMTEST, TRACE_EVENT_MEMTEST_ALLOC, i); err = ram_alloc(&ramcap, bits); if (err_is_fail(err)) { DEBUG_ERR(err, "ram_alloc failed"); } milli_sleep(1); err = ram_free(ramcap); if (err_is_fail(err)) { DEBUG_ERR(err, "ram_free failed"); } if ((i % 500 == 0) && (i > 0)) { debug_printf("allocated %d caps\n", i); } } while (err_is_ok(err)); // && (i < requests)); debug_printf("done benchmark. allocated %d caps (%lu bytes)\n", i, i * (1UL << bits)); }
/** **************************************************************************************** * @brief BLE main function. * * This function is called right after the booting process has completed. **************************************************************************************** */ int main(void) { int ble_sleep_st, usr_sleep_st; // DC-DC dc_dc_enable(QN_DC_DC_ENABLE); // QN platform initialization #if QN_NVDS_WRITE plf_init(QN_POWER_MODE, __XTAL, QN_32K_RCO, nvds_tmp_buf, NVDS_TMP_BUF_SIZE); #else plf_init(QN_POWER_MODE, __XTAL, QN_32K_RCO, NULL, 0); #endif #if (defined(QN_9020_B1) && (!QN_PMU_VOLTAGE)) disable_patch_b1(); #endif // System initialization, user configuration SystemInit(); // Profiles register #if (QN_WORK_MODE != WORK_MODE_HCI) prf_register(); #endif // BLE stack initialization // Notes: // 1. When the chip works on Network Processor Mode, UART flow control signal is used to implement sleep mode. // UART 's flow control feature shall be enabled. Enable this feature in the uart.c file. // 2. Controller mode does not support sleep mode. // 3. So far client example project does not support sleep mode. It will be implemented later. // Check to go normal work mode or test mode. // If the input of test control pin is low level, the program will enter into test mode, otherwise the program will // enter into work mode which is defined in the user configuration file. #if (defined(QN_TEST_CTRL_PIN)) if(gpio_read_pin(QN_TEST_CTRL_PIN) == GPIO_HIGH) { #endif // Work mode defined in the usr_config.h ble_init((enum WORK_MODE)QN_WORK_MODE, QN_HCI_PORT, QN_HCI_RD, QN_HCI_WR, ble_heap, BLE_HEAP_SIZE, QN_BLE_SLEEP); #if (defined(QN_TEST_CTRL_PIN)) } else { // Test mode (controller mode) ble_init((enum WORK_MODE)WORK_MODE_HCI, QN_HCI_PORT, QN_HCI_RD, QN_HCI_WR, ble_heap, BLE_HEAP_SIZE, false); // In the test mode, the program moniter test control pin. If the input of test control ping changes to low level, // it means work mode should be switched to the mode defined in the user configuration file. gpio_set_interrupt(QN_TEST_CTRL_PIN, GPIO_INT_HIGH_LEVEL); gpio_enable_interrupt(QN_TEST_CTRL_PIN); } #endif set_max_sleep_duration(QN_BLE_MAX_SLEEP_DUR); // If QN902x works on wireless SoC mode, initialize APP task #if (QN_WORK_MODE == WORK_MODE_SOC) app_init(); #endif usr_init(); sleep_init(); wakeup_by_sleep_timer(__32K_TYPE); GLOBAL_INT_START(); while(1) { ke_schedule(); // Checks for sleep have to be done with interrupt disabled GLOBAL_INT_DISABLE_WITHOUT_TUNER(); // Check whether the chip can enters sleep mode // // Chip enter sleep condition: // +--------+--------+--------+--------+--------+ // | USR | | | | | // | BLE | ACTIVE | IDLE | SLEEP | DEEP | // +--------+--------+--------+--------+--------+ // | ACTIVE | active | active | active | active | // | IDLE | active | idle | idle | idle | // | SLEEP | active | idle | sleep | deep | // +--------+--------+--------+--------+--------+ // Obtain the status of the user program usr_sleep_st = usr_sleep(); // If the user program can be sleep or deep sleep then check ble status if(usr_sleep_st != PM_ACTIVE) { // Obtain the status of ble sleep mode ble_sleep_st = ble_sleep(usr_sleep_st); // Check if the processor clock can be gated if(((ble_sleep_st == PM_IDLE) || (usr_sleep_st == PM_IDLE)) && (ble_sleep_st != PM_ACTIVE)) { // Debug //led_set(5, LED_OFF); //led_set(4, LED_ON); // led4 is on when enter into gating mode enter_sleep(SLEEP_CPU_CLK_OFF, WAKEUP_BY_ALL_IRQ_SOURCE, NULL); // Debug //led_set(4, LED_OFF); //led_set(5, LED_ON); // led5 is on when enter into active mode } // Check if the processor can be power down else if((ble_sleep_st == PM_SLEEP) && (usr_sleep_st == PM_SLEEP)) { // Debug //led_set(5, LED_OFF); //led_set(3, LED_ON); // led3 is on when enter into sleep mode enter_sleep(SLEEP_NORMAL, (WAKEUP_BY_OSC_EN | WAKEUP_BY_GPIO), sleep_cb); // Debug //led_set(3, LED_OFF); //led_set(5, LED_ON); // led5 is on when enter into active mode } // Check if the system can be deep sleep else if((ble_sleep_st == PM_SLEEP) && (usr_sleep_st == PM_DEEP_SLEEP)) { // Debug //led_set(5, LED_OFF); //led_set(2, LED_ON); // led2 is on when enter into deep sleep mode enter_sleep(SLEEP_DEEP, WAKEUP_BY_GPIO, sleep_cb); // Debug //led_set(2, LED_OFF); //led_set(5, LED_ON); // led5 is on when enter into active mode } } // Checks for sleep have to be done with interrupt disabled GLOBAL_INT_RESTORE_WITHOUT_TUNER(); } }
int main (void) { SystemInit(); #if 0 if (0x00000004 & inp32(0x40000038)) { outp32(0x40000038, 0x80000000); } else { Led_flash(); while(1); } #endif /* Initialize GPIO */ gpio_init(cb_gpio); #if TEST_SLEEP_NORMAL == TRUE // -------------------------------------------- // sleep wakeup // -------------------------------------------- //set all pin to gpio syscon_SetPMCR0(QN_SYSCON, 0x00000000); syscon_SetPMCR1(QN_SYSCON, 0x00000000); //set all gpio input gpio_set_direction_field(GPIO_PIN_ALL, GPIO_INPUT); gpio_write_pin_field(GPIO_PIN_ALL, (uint32_t)GPIO_HIGH); // pin pull ( 00 : High-Z, 01 : Pull-down, 10 : Pull-up, 11 : Reserved ) syscon_SetPPCR0(QN_SYSCON, 0xAAAA5AAA); // SWD pull-down save 20uA syscon_SetPPCR1(QN_SYSCON, 0x2AAAAAAA); // power down BUCK needed syscon_SetIvrefX32WithMask(QN_SYSCON, SYSCON_MASK_BUCK_BYPASS|SYSCON_MASK_BUCK_DPD, MASK_ENABLE); // power down Flash syscon_SetPGCR2WithMask(QN_SYSCON, SYSCON_MASK_FLASH_VCC_EN, MASK_DISABLE); // enable dbg power down syscon_SetPGCR2WithMask(QN_SYSCON, SYSCON_MASK_DBGPMUENABLE, MASK_ENABLE); // dis sar adc buffer syscon_SetPGCR1WithMask(QN_SYSCON, SYSCON_MASK_DIS_SAR_BUF, MASK_ENABLE); Led_flash(); do { delay(10); } while (gpio_read_pin(GPIO_P14) == GPIO_HIGH); sleep_init(); wakeup_by_sleep_timer(__32K_TYPE); wakeup_by_gpio(GPIO_P15, GPIO_WKUP_BY_LOW); do { gpio_set_direction(GPIO_P01, GPIO_INPUT); //enter_sleep(SLEEP_NORMAL, WAKEUP_BY_GPIO, Led_flash); if (wakeup_from_sleeptimer) { sleep_timer_set(32000); wakeup_from_sleeptimer = 0; #if QN_32K_RCO == TRUE clock_32k_correction_enable(clock_32k_correction_cb); #endif } #if QN_32K_RCO == TRUE if (gpio_sleep_allowed() && !dev_get_bf()) #else if (gpio_sleep_allowed()) #endif enter_sleep(SLEEP_NORMAL, WAKEUP_BY_OSC_EN|WAKEUP_BY_GPIO, Led_flash); } while(1); #endif #if TEST_SLEEP_DEEP == TRUE // -------------------------------------------- // deep sleep wakeup // -------------------------------------------- //set all pin to gpio syscon_SetPMCR0(QN_SYSCON, 0x00000000); syscon_SetPMCR1(QN_SYSCON, 0x00000000); //set all gpio input gpio_set_direction_field(GPIO_PIN_ALL, (uint32_t)GPIO_INPUT); gpio_write_pin_field(GPIO_PIN_ALL, (uint32_t)GPIO_HIGH); // pin pull ( 00 : High-Z, 01 : Pull-down, 10 : Pull-up, 11 : Reserved ) syscon_SetPPCR0(QN_SYSCON, 0xAAAA5AAA); // SWD pull-down save 20uA syscon_SetPPCR1(QN_SYSCON, 0x2AAAAAAA); // power down BUCK needed syscon_SetIvrefX32WithMask(QN_SYSCON, SYSCON_MASK_BUCK_BYPASS|SYSCON_MASK_BUCK_DPD, MASK_ENABLE); // power down Flash syscon_SetPGCR2WithMask(QN_SYSCON, SYSCON_MASK_FLASH_VCC_EN, MASK_DISABLE); // enable dbg power down syscon_SetPGCR2WithMask(QN_SYSCON, SYSCON_MASK_DBGPMUENABLE, MASK_ENABLE); // dis sar adc buffer syscon_SetPGCR1WithMask(QN_SYSCON, SYSCON_MASK_DIS_SAR_BUF, MASK_ENABLE); Led_flash(); do { delay(10); } while (gpio_read_pin(GPIO_P14) == GPIO_HIGH); sleep_init(); do { gpio_set_direction(GPIO_P01, GPIO_INPUT); wakeup_by_gpio(GPIO_P15, GPIO_WKUP_BY_CHANGE); enter_sleep(SLEEP_DEEP, WAKEUP_BY_GPIO, Led_flash); } while(1); #endif #if TEST_SLEEP_CPU_CLK_OFF == TRUE // -------------------------------------------- // clock gating // -------------------------------------------- // Set timer 0 wakeup timer_init(QN_TIMER0, NULL); timer_config(QN_TIMER0, TIMER_PSCAL_DIV, TIMER_COUNT_MS(1000, TIMER_PSCAL_DIV)); timer_enable(QN_TIMER0, MASK_ENABLE); sleep_init(); do { enter_sleep(SLEEP_CPU_CLK_OFF, WAKEUP_BY_TIMER0, NULL); Led_flash(); } while(1); #endif }