static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) { struct smc_local *lp = netdev_priv(dev); void __iomem *ioaddr = lp->base; unsigned int phydata; SMC_SELECT_BANK(lp, 3); smc_mii_out(dev, 0xffffffff, 32); smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14); phydata = smc_mii_in(dev, 18); SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO)); DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", __func__, phyaddr, phyreg, phydata); SMC_SELECT_BANK(lp, 2); return phydata; }
/* * Reads a register from the MII Management serial interface */ static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) { struct smc_local *lp = netdev_priv(dev); void __iomem *ioaddr = lp->base; unsigned int phydata; SMC_SELECT_BANK(lp, 3); /* Idle - 32 ones */ smc_mii_out(dev, 0xffffffff, 32); /* Start code (01) + read (10) + phyaddr + phyreg */ smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14); /* Turnaround (2bits) + phydata */ phydata = smc_mii_in(dev, 18); /* Return to idle state */ SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO)); DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", __func__, phyaddr, phyreg, phydata); SMC_SELECT_BANK(lp, 2); return phydata; }