/* TODO: cleanup soc_is_* */ static __init int samsung_gpiolib_init(void) { /* * Currently there are two drivers that can provide GPIO support for * Samsung SoCs. For device tree enabled platforms, the new * pinctrl-samsung driver is used, providing both GPIO and pin control * interfaces. For legacy (non-DT) platforms this driver is used. */ if (of_have_populated_dt()) return -ENODEV; samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs)); if (soc_is_s3c24xx()) { s3c24xx_gpiolib_add_chips(s3c24xx_gpios, ARRAY_SIZE(s3c24xx_gpios), S3C24XX_VA_GPIO); } else if (soc_is_s3c64xx()) { samsung_gpiolib_add_2bit_chips(s3c64xx_gpios_2bit, ARRAY_SIZE(s3c64xx_gpios_2bit), S3C64XX_VA_GPIO + 0xE0, 0x20); samsung_gpiolib_add_4bit_chips(s3c64xx_gpios_4bit, ARRAY_SIZE(s3c64xx_gpios_4bit), S3C64XX_VA_GPIO); samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, ARRAY_SIZE(s3c64xx_gpios_4bit2)); } else { WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); return -ENODEV; } return 0; }
static int __init wlf_gf_module_register(void) { if (!soc_is_s3c64xx()) return 0; return i2c_add_driver(&wlf_gf_module_driver); }
static int __init s3c6400_core_init(void) { /* Not applicable when using DT. */ if (of_have_populated_dt() || soc_is_s3c64xx()) return 0; return subsys_system_register(&s3c6400_subsys, NULL); }
static void __init s3c64xx_dt_map_io(void) { debug_ll_io_init(); iotable_init(s3c64xx_dt_iodesc, ARRAY_SIZE(s3c64xx_dt_iodesc)); s3c64xx_init_cpu(); if (!soc_is_s3c64xx()) panic("SoC is not S3C64xx!"); }
/* TODO: cleanup soc_is_* */ static __init int samsung_gpiolib_init(void) { struct samsung_gpio_chip *chip; int i, nr_chips; int group = 0; /* * Currently there are two drivers that can provide GPIO support for * Samsung SoCs. For device tree enabled platforms, the new * pinctrl-samsung driver is used, providing both GPIO and pin control * interfaces. For legacy (non-DT) platforms this driver is used. */ if (of_have_populated_dt()) return -ENODEV; samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs)); if (soc_is_s3c24xx()) { s3c24xx_gpiolib_add_chips(s3c24xx_gpios, ARRAY_SIZE(s3c24xx_gpios), S3C24XX_VA_GPIO); } else if (soc_is_s3c64xx()) { samsung_gpiolib_add_2bit_chips(s3c64xx_gpios_2bit, ARRAY_SIZE(s3c64xx_gpios_2bit), S3C64XX_VA_GPIO + 0xE0, 0x20); samsung_gpiolib_add_4bit_chips(s3c64xx_gpios_4bit, ARRAY_SIZE(s3c64xx_gpios_4bit), S3C64XX_VA_GPIO); samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, ARRAY_SIZE(s3c64xx_gpios_4bit2)); } else if (soc_is_s5pv210()) { group = 0; chip = s5pv210_gpios_4bit; nr_chips = ARRAY_SIZE(s5pv210_gpios_4bit); for (i = 0; i < nr_chips; i++, chip++) { if (!chip->config) { chip->config = &samsung_gpio_cfgs[3]; chip->group = group++; } } samsung_gpiolib_add_4bit_chips(s5pv210_gpios_4bit, nr_chips, S5P_VA_GPIO); #if defined(CONFIG_CPU_S5PV210) && defined(CONFIG_S5P_GPIO_INT) s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); #endif } else { WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); return -ENODEV; } return 0; }