int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
size_t cmd_len, void *data, size_t data_len)
{
struct spi_slave *spi = flash->spi;
int ret;
spi_claim_bus(spi);
ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
spi_release_bus(spi);
return ret;
}
int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
{
return spi_flash_cmd_read(spi, &cmd, 1, response, len);
}
/**
* spi_enable_quad_bit - Enable the QUAD bit for SPI flash
*
* This function will enable the quad bit in flash using
* the QSPI controller. Supports only spansion.
*
* @spi : SPI slave structure
*/
void spi_enable_quad_bit(struct spi_slave *spi)
{
int ret;
u8 idcode[5];
u8 rdid_cmd = 0x9f; /* RDID */
u8 rcr_data = 0;
u8 rcr_cmd = 0x35; /* RCR */
u8 rdsr_cmd = 0x05; /* RDSR */
u8 wren_cmd = 0x06; /* WREN */
ret = spi_flash_cmd(spi, rdid_cmd, &idcode, sizeof(idcode));
if (ret) {
debug("SF error: Failed read RDID\n");
return;
}
if ((idcode[0] == 0x01) || (idcode[0] == 0xef)) {
/* Read config register */
ret = spi_flash_cmd_read(spi, &rcr_cmd, sizeof(rcr_cmd),
&rcr_data, sizeof(rcr_data));
if (ret) {
debug("SF error: Failed read RCR\n");
return;
}
if (rcr_data & 0x2)
debug("QUAD bit is already set..\n");
else {
debug("QUAD bit needs to be set ..\n");
/* Write enable */
ret = spi_flash_cmd(spi, wren_cmd, NULL, 0);
if (ret) {
debug("SF error: Failed write WREN\n");
return;
}
/* Write QUAD bit */
xqspips_write_quad_bit((void *)XPSS_QSPI_BASEADDR);
/* Read RDSR */
do {
ret = spi_flash_cmd_read(spi, &rdsr_cmd,
sizeof(rdsr_cmd), &rcr_data,
sizeof(rcr_data));
} while ((ret == 0) && (rcr_data != 0));
/* Read config register */
ret = spi_flash_cmd_read(spi, &rcr_cmd, sizeof(rcr_cmd),
&rcr_data, sizeof(rcr_data));
if (!(rcr_data & 0x2)) {
printf("SF error: Fail to set QUAD enable bit"
" 0x%x\n", rcr_data);
return;
} else
debug("SF: QUAD enable bit is set 0x%x\n",
rcr_data);
}
} else
debug("SF: QUAD bit not enabled for 0x%x SPI flash\n",
idcode[0]);
return;
}
int spi_flash_cmd(u8 cmd, void *response, size_t len)
{
return spi_flash_cmd_read(&cmd, 1, response, len);
}
static inline int spi_flash_cmd(u8 cmd, void *response, u32 len)
{
return spi_flash_cmd_read(&cmd, 1, response, len);
}