/**
* @brief Function for transmitting data between SPI master and SPI slave.
*/
uint32_t spi_master_send_recv(const spi_master_hw_instance_t spi_master_hw_instance,
uint8_t * const p_tx_buf, const uint16_t tx_buf_len,
uint8_t * const p_rx_buf, const uint16_t rx_buf_len)
{
#if defined(SPI_MASTER_0_ENABLE) || defined(SPI_MASTER_1_ENABLE)
spi_master_instance_t * p_spi_instance = spi_master_get_instance(spi_master_hw_instance);
uint32_t err_code = NRF_SUCCESS;
uint16_t max_length = 0;
if (p_spi_instance->state == SPI_MASTER_STATE_IDLE)
{
NVIC_DisableIRQ(p_spi_instance->irq_type);
max_length = (rx_buf_len > tx_buf_len) ? rx_buf_len : tx_buf_len;
if (max_length > 0)
{
p_spi_instance->state = SPI_MASTER_STATE_BUSY;
p_spi_instance->start_flag = true; //abort_flag should set by abort and cleared only by restart
p_spi_instance->bytes_count = 0;
p_spi_instance->max_length = max_length;
spi_master_buffer_release(&(p_spi_instance->p_tx_buffer), &(p_spi_instance->tx_length));
spi_master_buffer_release(&(p_spi_instance->p_rx_buffer), &(p_spi_instance->rx_length));
/* Initialize buffers */
spi_master_buffer_init(p_tx_buf, tx_buf_len, &(p_spi_instance->p_tx_buffer),
&(p_spi_instance->tx_length), &(p_spi_instance->tx_index));
spi_master_buffer_init(p_rx_buf, rx_buf_len, &(p_spi_instance->p_rx_buffer),
&(p_spi_instance->rx_length), &(p_spi_instance->rx_index));
nrf_gpio_pin_clear(p_spi_instance->pin_slave_select);
spi_master_send_initial_bytes(p_spi_instance);
spi_master_signal_evt(p_spi_instance, SPI_MASTER_EVT_TRANSFER_STARTED, max_length);
}
else
{
err_code = NRF_ERROR_INVALID_PARAM;
}
NVIC_EnableIRQ(p_spi_instance->irq_type);
}
else
{
err_code = NRF_ERROR_BUSY;
}
return err_code;
#else
return NRF_ERROR_NOT_SUPPORTED;
#endif
}
uint32_t spi_master_send_recv(const spi_master_hw_instance_t spi_master_hw_instance,
uint8_t * const p_tx_buf, const uint16_t tx_buf_len,
uint8_t * const p_rx_buf, const uint16_t rx_buf_len)
{
#if defined(SPI_MASTER_0_ENABLE) || defined(SPI_MASTER_1_ENABLE)
volatile spi_master_instance_t * p_spi_instance = spi_master_get_instance(
spi_master_hw_instance);
APP_ERROR_CHECK_BOOL(p_spi_instance != NULL);
uint32_t err_code = NRF_SUCCESS;
uint16_t max_length = 0;
uint8_t nested_critical_region = 0;
//Check if disable all IRQs flag is set
if (p_spi_instance->disable_all_irq)
{
//Disable interrupts.
APP_ERROR_CHECK(sd_nvic_critical_region_enter(&nested_critical_region));
}
else
{
//Disable interrupt SPI.
APP_ERROR_CHECK(sd_nvic_DisableIRQ(p_spi_instance->irq_type));
}
//Initialize and perform data transfer
if (p_spi_instance->state == SPI_MASTER_STATE_IDLE)
{
max_length = (rx_buf_len > tx_buf_len) ? rx_buf_len : tx_buf_len;
if (max_length > 0)
{
p_spi_instance->state = SPI_MASTER_STATE_BUSY;
p_spi_instance->bytes_count = 0;
p_spi_instance->started_flag = false;
p_spi_instance->max_length = max_length;
/* Initialize buffers */
spi_master_buffer_init(p_tx_buf,
tx_buf_len,
&(p_spi_instance->p_tx_buffer),
&(p_spi_instance->tx_length),
&(p_spi_instance->tx_index));
spi_master_buffer_init(p_rx_buf,
rx_buf_len,
&(p_spi_instance->p_rx_buffer),
&(p_spi_instance->rx_length),
&(p_spi_instance->rx_index));
nrf_gpio_pin_clear(p_spi_instance->pin_slave_select);
spi_master_send_initial_bytes(p_spi_instance);
}
else
{
err_code = NRF_ERROR_INVALID_PARAM;
}
}
else
{
err_code = NRF_ERROR_BUSY;
}
//Check if disable all IRQs flag is set.
if (p_spi_instance->disable_all_irq)
{
//Enable interrupts.
APP_ERROR_CHECK(sd_nvic_critical_region_exit(nested_critical_region));
}
else
{
//Enable SPI interrupt.
APP_ERROR_CHECK(sd_nvic_EnableIRQ(p_spi_instance->irq_type));
}
return err_code;
#else
return NRF_ERROR_NOT_SUPPORTED;
#endif
}
