void radio_write_single_reg(uint8_t reg, uint8_t data)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_clear(R_CS_PORT, R_CS_PIN);
spi_send8(R_SPI, reg | (1<<7));
spi_read8(R_SPI);
// Wait until send FIFO is empty
while(SPI_SR(R_SPI) & SPI_SR_BSY);
spi_send8(R_SPI, data);
spi_read8(R_SPI);
// Wait until send FIFO is empty
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_set(R_CS_PORT, R_CS_PIN);
}
uint8_t radio_read_single_reg(uint8_t reg)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_clear(R_CS_PORT, R_CS_PIN);
spi_send8(R_SPI, reg & 0x7F);
spi_read8(R_SPI);
// Wait until send FIFO is empty
while(SPI_SR(R_SPI) & SPI_SR_BSY);
spi_send8(R_SPI, 0x0);
while(SPI_SR(R_SPI) & SPI_SR_BSY);
uint8_t out = spi_read8(R_SPI);
gpio_set(R_CS_PORT, R_CS_PIN);
return out;
}
static void read_pni_config(void)
{
u8 i;
for(i=0;i<2;i++)
{
pni[i].Mode = spi_read8(CMM,i);
pni[i].Update_Rate = spi_read8(TMRC,i);
pni[i].Gian[X_AXIS] = spi_read16(CCX,i);
pni[i].Gian[Y_AXIS] = spi_read16(CCY,i);
pni[i].Gian[Z_AXIS] = spi_read16(CCZ,i);
}
// pni[0].Update_Rate = spi_read8(TMRC,0);
// pni[1].Update_Rate = spi_read8(TMRC,1);
}
static void radio_write_reg_start(uint8_t reg)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_clear(R_CS_PORT, R_CS_PIN);
spi_send8(R_SPI, reg | (1<<7));
spi_read8(R_SPI);
}
void radio_read_burst_reg(uint8_t reg, uint8_t *buff, uint16_t len)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_clear(R_CS_PORT, R_CS_PIN);
spi_send8(R_SPI, reg & 0x7F);
spi_read8(R_SPI);
// Wait until send FIFO is empty
while(SPI_SR(R_SPI) & SPI_SR_BSY);
uint16_t i;
for ( i = 0; i < len; i++)
{
spi_send8(R_SPI, 0x0);
while(SPI_SR(R_SPI) & SPI_SR_BSY);
buff[i] = spi_read8(R_SPI);
}
gpio_set(R_CS_PORT, R_CS_PIN);
}
void radio_write_burst_reg(uint8_t reg, uint8_t *data, uint16_t len)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_clear(R_CS_PORT, R_CS_PIN);
spi_send8(R_SPI, reg | (1<<7));
spi_read8(R_SPI);
// Wait until send FIFO is empty
uint16_t i = 0;
for (i = 0; i < len; i++)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
spi_send8(R_SPI, data[i]);
spi_read8(R_SPI);
}
// Wait until send FIFO is empty
while(SPI_SR(R_SPI) & SPI_SR_BSY);
gpio_set(R_CS_PORT, R_CS_PIN);
}
u8 _spi_read8(struct intf_hdl *pintfhdl, u32 addr)
{
u8 val;
_func_enter_;
val = spi_read8(pintfhdl->padapter, addr, NULL);
_func_exit_;
return val;
}
static void radio_write_reg_continuing(uint8_t data)
{
while(SPI_SR(R_SPI) & SPI_SR_BSY);
spi_send8(R_SPI, data);
spi_read8(R_SPI);
}
void spi_int_dpc(PADAPTER padapter, u32 sdio_hisr)
{
PHAL_DATA_TYPE phal;
static u32 last_c2h;
phal = GET_HAL_DATA(padapter);
if (sdio_hisr & SPI_HISR_CPWM1)
{
struct reportpwrstate_parm report;
report.state = spi_read8(padapter, SPI_LOCAL_OFFSET | SDIO_REG_HCPWM1, NULL);
#ifdef CONFIG_LPS_LCLK
cpwm_int_hdl(padapter, &report);
#endif
}
if (sdio_hisr & SPI_HISR_TXERR)
{
u32 status;
status = rtw_read32(padapter, REG_TXDMA_STATUS);
rtw_write32(padapter, REG_TXDMA_STATUS, status);
//DBG_8192C("%s: SPI_HISR_TXERR (0x%08x)\n", __func__, status);
}
if (sdio_hisr & SPI_HISR_TXBCNOK)
{
DBG_8192C("%s: SPI_HISR_TXBCNOK\n", __func__);
}
if (sdio_hisr & SPI_HISR_TXBCNERR)
{
DBG_8192C("%s: SPI_HISR_TXBCNERR\n", __func__);
}
if (sdio_hisr & SPI_HISR_C2HCMD)
{
DBG_8192C("%s: C2H Command\n", __func__);
last_c2h = rtw_c2h_wk_cmd(padapter);
} else if (last_c2h != _SUCCESS) {
/* check C2H stuck */
u8 have_c2h = 0;
have_c2h = rtw_read8(padapter, REG_C2HEVT_CLEAR);
if (have_c2h) {
DBG_871X_LEVEL(_drv_err_, "%s: c2h stuck\n", __FUNCTION__);
last_c2h = rtw_c2h_wk_cmd(padapter);
} else {
last_c2h = _SUCCESS;
}
}
if (sdio_hisr & SPI_HISR_RX_REQUEST)// || sdio_hisr & SPI_HISR_RXFOVW)
{
struct dvobj_priv *dvobj = padapter->dvobj;
PGSPI_DATA pgspi_data = &dvobj->intf_data;
if (pgspi_data->priv_wq)
queue_delayed_work(pgspi_data->priv_wq, &pgspi_data->recv_work, 0);
}
}
int main(void)
{
uint8_t temp;
int16_t gyr_x;
clock_setup();
gpio_setup();
usart_setup();
spi_setup();
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_CTRL_REG1);
spi_read8(SPI1);
spi_send8(SPI1, GYR_CTRL_REG1_PD | GYR_CTRL_REG1_XEN | GYR_CTRL_REG1_YEN | GYR_CTRL_REG1_ZEN | (3 << GYR_CTRL_REG1_BW_SHIFT));
spi_read8(SPI1);
gpio_set(GPIOE, GPIO3);
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_CTRL_REG4);
spi_read8(SPI1);
spi_send8(SPI1, (1 << GYR_CTRL_REG4_FS_SHIFT));
spi_read8(SPI1);
gpio_set(GPIOE, GPIO3);
while (1) {
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_WHO_AM_I | GYR_RNW);
spi_read8(SPI1);
spi_send8(SPI1, 0);
temp=spi_read8(SPI1);
my_usart_print_int(USART2, (temp));
gpio_set(GPIOE, GPIO3);
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_STATUS_REG | GYR_RNW);
spi_read8(SPI1);
spi_send8(SPI1, 0);
temp=spi_read8(SPI1);
my_usart_print_int(USART2, (temp));
gpio_set(GPIOE, GPIO3);
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_OUT_TEMP | GYR_RNW);
spi_read8(SPI1);
spi_send8(SPI1, 0);
temp=spi_read8(SPI1);
my_usart_print_int(USART2, (temp));
gpio_set(GPIOE, GPIO3);
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_OUT_X_L | GYR_RNW);
spi_read8(SPI1);
spi_send8(SPI1, 0);
gyr_x=spi_read8(SPI1);
gpio_set(GPIOE, GPIO3);
gpio_clear(GPIOE, GPIO3);
spi_send8(SPI1, GYR_OUT_X_H | GYR_RNW);
spi_read8(SPI1);
spi_send8(SPI1, 0);
gyr_x|=spi_read8(SPI1) << 8;
my_usart_print_int(USART2, (gyr_x));
gpio_set(GPIOE, GPIO3);
int i;
for (i = 0; i < 80000; i++) /* Wait a bit. */
__asm__("nop");
}
return 0;
}
static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
{
struct s3c24xx_spi *hw = to_hw(spi);
int i=0;
//static int flag=1;
//unsigned char data1,data2;
//char cmd[4]={0x38,0x80,0xab,0xcd};
hw->tx = t->tx_buf;
hw->rx = t->rx_buf;
hw->len = t->len;
hw->count = 0;
//init_completion(&hw->done);
//hw->fiq_inuse = 0;
//if (s3c24xx_spi_usefiq(hw) && t->len >= 3)
// s3c24xx_spi_tryfiq(hw);
//writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
//wait_for_completion(&hw->done);
for (i = 0; i < t->len; i=i+1)
{
spi_write8(hw,hw_txbyte(hw,i));
if(hw->rx)
hw->rx[i]=spi_read8(hw);
// udelay(2);
}
hw->count = hw->len;
#if 0
//for(i=0;i<hw->len;i++)
//printk("%02x ",hw->tx[i]);
//printk("==>\n");
/* send the first byte */
if(flag){
for (i = 0; i < 4; i=i+2)
{
spi_write8(hw,cmd[i]);
spi_write8(hw,cmd[i+1]);
udelay(2);
}
flag=0;
//s3c24xx_spi_chipsel(spi,BITBANG_CS_INACTIVE);
}
else
{
//s3c24xx_spi_chipsel(spi,BITBANG_CS_INACTIVE);
//udelay(500);
//s3c24xx_spi_chipsel(spi,BITBANG_CS_ACTIVE);
spi_write8(hw,0x38);
spi_write8(hw,0x80);
udelay(2);
for(i=0;i<3;i++){
spi_write8(hw,0xff);
data1=spi_read8(hw);
spi_write8(hw,0xff);
data2=spi_read8(hw);
udelay(2);
}
printk("1<== %02x\n",data1);
printk("2<== %02x\n",data2);
flag=1;
}
//udelay(2);
//if ((hw->len % 4) != 0) {
// spi_write8(hw,0);
// spi_write8(hw,0);
// udelay(2);
//}
hw->count = hw->len;
//writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
//wait_for_completion(&hw->done);
#endif
return hw->count;
}
