void bfin_get_num_params(volatile u32* num) {
#if 1
*num = 0;
#else
u16 x;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_NUM_PARAMS_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
print_dbg("\r\n : spi_write MSG_GET_NUM_PARAMS");
// read num
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
*num = (u8)(x & 0xff);
print_dbg("\r\n : spi_read numparams: ");
print_dbg_ulong(*num);
app_resume();
#endif
}
//this gets an experiment, plus additional data, from the host
//A full cluster will be transferred
void get_experiment_from_host_to_SD(void)
{
USB_USART->rtor=0; //going to use PDCA for receiving data, so disable receive timeout
pdca_disable(USB_USART_RX_PDCA_CHANNEL);
my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&bank0[0]),samplebuffer_size, USB_USART_RX_PDCA_PID, 0, 0, PDCA_TRANSFER_SIZE_BYTE);
pdca_enable(USB_USART_RX_PDCA_CHANNEL);
while(!(pdca_get_transfer_status(USB_USART_RX_PDCA_CHANNEL) & AVR32_PDCA_TRC_MASK)); //wait until transfer is done
pdca_disable(USB_USART_RX_PDCA_CHANNEL); //reset USART RX channel to receive host commands
USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //changing back to receiving command mode
USB_USART->rtor=15000; //so reenable timeout
pdca_load_channel(USB_USART_RX_PDCA_CHANNEL, (&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)));
pdca_enable(USB_USART_RX_PDCA_CHANNEL);
spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS);
while(check_busy_fast()!=0xFF);
spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS);
my_SD_SPI_block_write_multi(bank0,experiment_base_address,blocks_per_cluster); //write data to SD
spi_selectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS);
while(check_busy_fast()!=0xFF);
spi_unselectChip(SD_MMC_SPI, SD_MMC_SPI_NPCS);
}
static void cvTimer_callback(void* o) {
u8 i;
for(i=0;i<4;i++)
if(aout[i].now != aout[i].target) {
aout[i].now += (aout[i].target - aout[i].now) / aout[i].step;
aout[i].step--;
monomeFrameDirty++;
}
spi_selectChip(SPI,DAC_SPI);
spi_write(SPI,0x31);
spi_write(SPI,aout[2].now>>4);
spi_write(SPI,aout[2].now<<4);
spi_write(SPI,0x31);
spi_write(SPI,aout[0].now>>4);
spi_write(SPI,aout[0].now<<4);
spi_unselectChip(SPI,DAC_SPI);
spi_selectChip(SPI,DAC_SPI);
spi_write(SPI,0x38);
spi_write(SPI,aout[3].now>>4);
spi_write(SPI,aout[3].now<<4);
spi_write(SPI,0x38);
spi_write(SPI,aout[1].now>>4);
spi_write(SPI,aout[1].now<<4);
spi_unselectChip(SPI,DAC_SPI);
}
static int special_qt60168_send_cmd(unsigned char cmd)
{
static int state=0;
switch(state) {
case 0:
// Select QT60168
spi_selectChip(QT60168_SPI,QT60168_SPI_NCPS);
// Write CMD
spi_write(QT60168_SPI, cmd);
// Unselect QT60168
spi_unselectChip(QT60168_SPI,QT60168_SPI_NCPS);
state = 1;
Read_data=1;
break;
case 1:
if(Read_data==0) {
state=0;
}
break;
default:
state=0;
}
return state;
}
// get module name
void bfin_get_module_name(volatile char* buf) {
char name[MODULE_NAME_LEN];
u16 x; // u16 for spi_read()
u8 i;
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_MODULE_NAME_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
for(i=0; i<MODULE_NAME_LEN; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
name[i] = (char)(x & 0xff);
}
}
// perform a conversion on all 4 channels
static void adc_convert(u16 (*dst)[4]) {
#if 1
#else
u16 cmd, val;
// data into AD7923 is a left-justified 12-bit value in a 16-bit word
// so, always lshift the command before sending
cmd = ( AD7923_CMD_BASE ) << 4;
spi_selectChip(ADC_SPI, ADC_SPI_NPCS);
spi_write(ADC_SPI, cmd);
spi_unselectChip(ADC_SPI, ADC_SPI_NPCS);
// get channel 0, setup channel 1
cmd = ( AD7923_CMD_BASE | AD7923_CTL_ADD0 ) << 4;
spi_selectChip(ADC_SPI, ADC_SPI_NPCS);
spi_write(ADC_SPI, cmd);
spi_read(ADC_SPI, &val);
spi_unselectChip(ADC_SPI, ADC_SPI_NPCS);
(*dst)[0] = val & 0xfff;
// get channel 1, setup channel 2
cmd = ( AD7923_CMD_BASE | AD7923_CTL_ADD1 ) << 4;
spi_selectChip(ADC_SPI, ADC_SPI_NPCS);
spi_write(ADC_SPI, cmd);
spi_read(ADC_SPI, &val);
spi_unselectChip(ADC_SPI, ADC_SPI_NPCS);
(*dst)[1] = val & 0xfff;
// get channel 2, setup channel 3
cmd = ( AD7923_CMD_BASE | AD7923_CTL_ADD1 | AD7923_CTL_ADD0 ) << 4;
spi_selectChip(ADC_SPI, ADC_SPI_NPCS);
spi_write(ADC_SPI, cmd);
spi_read(ADC_SPI, &val);
spi_unselectChip(ADC_SPI, ADC_SPI_NPCS);
(*dst)[2] = val & 0xfff;
// get channel 3, dummy write
cmd = ( AD7923_CMD_BASE ) << 4;
spi_selectChip(ADC_SPI, ADC_SPI_NPCS);
spi_write(ADC_SPI, cmd);
spi_read(ADC_SPI, &val);
spi_unselectChip(ADC_SPI, ADC_SPI_NPCS);
(*dst)[3] = val & 0xfff;
#endif
}
void bfin_disable(void) {
#if 1
#else
// disable audio processing
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_DISABLE_AUDIO);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
#endif
}
void bfin_get_num_params(volatile u32* num) {
u16 x;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_NUM_PARAMS_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// read num
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
*num = (u8)(x & 0xff);
app_resume();
}
void init_dacs(void) {
// setup daisy chain for two dacs
spi_selectChip(DAC_SPI, DAC_SPI_NPCS);
spi_write(SPI,0x80);
spi_write(SPI,0xff);
spi_write(SPI,0xff);
spi_unselectChip(DAC_SPI, DAC_SPI_NPCS);
reset_dacs();
}
void bfin_get_param_desc(u16 paramIdx, volatile ParamDesc* pDesc) {
ParamValue pval;
u16 x; // u16 for spi_read()
u8 i;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_PARAM_DESC_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// idx
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, paramIdx);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// read label
for(i=0; i<PARAM_LABEL_LEN; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->label[i] = (char)(x & 0xff);
}
// read unit
for(i=0; i<PARAM_UNIT_LEN; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->unit[i] = (char)(x & 0xff);
}
// read type
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->type = (U8)(x & 0xff);
// read min
for(i=0; i<4; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[i] = (u8)(x & 0xff);
}
pDesc->min = pval.asInt;
// read max
for(i=0; i<4; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[i] = (u8)(x & 0xff);
}
pDesc->max = pval.asInt;
app_resume();
}
// get module version
void bfin_get_module_version(ModuleVersion* vers) {
u16 x;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_MODULE_VERSION_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// major
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
vers->maj = x;
// minor
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
vers->min = x;
// rev
vers->rev = 0;
// rev high
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
vers->rev |= ((x << 8) & 0xff00);
// rev low
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
vers->rev |= (x & 0x00ff);
app_resume();
}
void bfin_start_transfer(void) {
// FIXME
volatile u64 delay;
gpio_set_gpio_pin(BFIN_RESET_PIN);
delay = 30; while (--delay > 0) {;;}
gpio_clr_gpio_pin(BFIN_RESET_PIN);
delay = 30; while (--delay > 0) {;;}
gpio_set_gpio_pin(BFIN_RESET_PIN);
delay = 3000; while (--delay > 0) {;;}
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
}
void updateCvOuts(void)
{
// let's output values[0] to CV A and values[1] to CV B
// output range is 0..4095, values[] is 0..64, so we need to scale
cv0 = values[0] << 6; if (cv0 > 4095) cv0 = 4095; // keep it within the range
cv1 = values[1] << 6; if (cv1 > 4095) cv1 = 4095;
// write to DAC
spi_selectChip(SPI,DAC_SPI);
spi_write(SPI,0x31); // update A
spi_write(SPI,cv0>>4);
spi_write(SPI,cv0<<4);
spi_unselectChip(SPI,DAC_SPI);
spi_selectChip(SPI,DAC_SPI);
spi_write(SPI,0x38); // update B
spi_write(SPI,cv1>>4);
spi_write(SPI,cv1<<4);
spi_unselectChip(SPI,DAC_SPI);
}
// setup ad7923
void init_adc(void) {
#if 1
#else
u16 cmd;
// at powerup, the part wants a dummy conversion with DIN high
spi_selectChip(ADC_SPI, ADC_SPI_NPCS);
spi_write(ADC_SPI, 0xffff);
spi_unselectChip(ADC_SPI, ADC_SPI_NPCS);
// wait for powerup time (5us in datasheet)
delay_us(5);
// write base configuration
cmd = AD7923_CMD_BASE << 4;
spi_selectChip( ADC_SPI, ADC_SPI_NPCS );
spi_write( ADC_SPI, cmd );
spi_unselectChip( ADC_SPI, ADC_SPI_NPCS );
#endif
}
/*! \brief Selects or unselects a DF memory.
*
* \param memidx Memory ID of DF to select or unselect.
* \param bSelect Boolean indicating whether the DF memory has to be selected.
*/
static void at45dbx_chipselect_df(U8 memidx, Bool bSelect)
{
if (bSelect)
{
// Select SPI chip.
spi_selectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx);
}
else
{
// Unselect SPI chip.
spi_unselectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx);
}
}
// get module name
void bfin_get_module_name(volatile char* buf) {
#if 1
#else
u16 x; // u16 for spi_read()
u8 i;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_MODULE_NAME_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
for(i=0; i<MODULE_NAME_LEN; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
buf[i] = (char)(x & 0xff);
}
app_resume();
#endif
}
//void bfin_set_param(u8 idx, f32 x ) {
void bfin_set_param(u8 idx, fix16_t x ) {
#if 1
#else
//static u32 ticks = 0;
ParamValueCommon pval;
pval.asInt = (s32)x;
print_dbg("\r\n bfin_set_param, idx: ");
print_dbg_ulong(idx);
print_dbg(",\t val: 0x");
print_dbg_hex((u32)x);
/*
print_dbg(", \t elapsed ms: ");
print_dbg_ulong(tcTicks - ticks);
print_dbg("\r\n");
ticks = tcTicks;
*/
// app_pause();
// command
bfin_wait();
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_SET_PARAM_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//idx
bfin_wait();
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, idx);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// val0
bfin_wait();
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[0]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// val1
bfin_wait();
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[1]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//val2
bfin_wait();
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[2]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//val3
bfin_wait();
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[3]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// app_resume();
#endif
}
__interrupt
#endif
void rtc_irq(void)
{
static volatile int delay_count=0;
static unsigned short all_key= 0;
static int update_delay = 0;
delay_count++;
update_delay++;
if(update_delay>10) {
if(special_qt60168_report_all_key(&all_key)==true) {
update_delay=0;
//gpio_tgl_gpio_pin(LED2_GPIO);
Old_status = New_status;
New_status = all_key; // The one that has just been read
if(Old_status != New_status) {
update_joystick_status( New_status);
}
if(New_status!=0) { // LED2 on if key is currently pressed
gpio_clr_gpio_pin(LED2_GPIO);
}
else {
gpio_set_gpio_pin(LED2_GPIO);
}
}
}
if(Read_data==1) {
Read_data=2;
delay_count=0;
}
if((delay_count>1)&&(Read_data==2)) {
// We can read the DATA
// Select QT60168
spi_selectChip(QT60168_SPI,QT60168_SPI_NCPS);
// Read Reply
spi_read(QT60168_SPI, &Data);
// Unselect QT60168
spi_unselectChip(QT60168_SPI,QT60168_SPI_NCPS);
Read_data=0;
}
// clear the interrupt flag
rtc_clear_interrupt(&AVR32_RTC);
}
void bfin_start_transfer(void) {
#if 1
#else
// volatile u64 delay;
gpio_set_gpio_pin(BFIN_RESET_PIN);
// delay = 30; while (--delay > 0) {;;}
delay_ms(1);
gpio_clr_gpio_pin(BFIN_RESET_PIN);
// delay = 30; while (--delay > 0) {;;}
delay_ms(1);
gpio_set_gpio_pin(BFIN_RESET_PIN);
// delay = 3000; while (--delay > 0) {;;}
delay_ms(1);
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
#endif
}
// get parameter value
s32 bfin_get_param(u8 idx) {
#if 1
#else
ParamValueCommon pval;
u16 x;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_PARAM_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// idx
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, idx);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
/// read value
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); // don't care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[0] = (u8)x;
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); // don't care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[1] = (u8)x;
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); // don't care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[2] = (u8)x;
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); // don't care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[3] = (u8)x;
app_resume();
return pval.asInt;
#endif
}
ISR(rtc_irq, AVR32_RTC_IRQ_GROUP, AVR32_INTC_INT0)
{
static volatile int delay_count = 0;
static unsigned short all_key = 0;
static int update_delay = 0;
delay_count++;
update_delay++;
if (update_delay > 10)
{
if (special_qt60168_report_all_key(&all_key) == true)
{
update_delay = 0;
controller_keys_update(all_key);
}
}
if (Read_data == 1)
{
Read_data = 2;
delay_count = 0;
}
if ((delay_count > 1) && (Read_data == 2))
{
// We can read the DATA
// Select QT60168
spi_selectChip(QT60168_SPI,QT60168_SPI_NCPS);
// Read Reply
spi_read(QT60168_SPI, &Data);
// Unselect QT60168
spi_unselectChip(QT60168_SPI,QT60168_SPI_NCPS);
Read_data = 0;
}
// clear the interrupt flag
rtc_clear_interrupt(&AVR32_RTC);
}
//void bfin_set_param(u8 idx, f32 x ) {
void bfin_set_param(u8 idx, fix16_t x ) {
static ParamValue pval;
pval.asInt = (s32)x;
print_dbg("\r\n bfin_set_param, idx: ");
print_dbg_ulong(idx);
print_dbg(", val: 0x");
print_dbg_hex((u32)x);
// app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_SET_PARAM_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//idx
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, idx);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//val0
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[0]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// val1
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[1]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//val2
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[2]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
//val3
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, pval.asByte[3]);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// app_resume();
}
/*! \brief Writes the \a ctrl control word.
*/
static void aic23b_write_control_word(aic23b_ctrl_t ctrl)
{
#if AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_TWI
int twi_status;
aic23b_ctrl_t my_ctrl = ctrl;
twi_package_t twi_package =
{
.chip = AIC23B_TWI_ADDRESS,
.addr_length = 0,
.buffer = &my_ctrl,
.length = sizeof(my_ctrl)
};
do
{
twi_status=twi_master_write(AIC23B_TWI, &twi_package);
}
while( twi_status != TWI_SUCCESS );
#elif AIC23B_CTRL_INTERFACE == AIC23B_CTRL_INTERFACE_SPI
spi_selectChip(AIC23B_SPI, AIC23B_SPI_NPCS);
spi_write(AIC23B_SPI, *(uint16_t *)&ctrl);
spi_unselectChip(AIC23B_SPI, AIC23B_SPI_NPCS);
#endif
}
/*! \name Low-Level Interface
*/
//! @{
void aic23b_configure_freq(int master_clock_hz, int sample_rate_hz)
{
aic23b_src_t src;
src.data = AIC23B_DEFAULT(AIC23B_SRC);
src.clkout = 0;
src.clkin = 0;
switch (master_clock_hz)
{
case 12000000:
src.usb = 1;
if (sample_rate_hz < (8000 + 8021) / 2)
{ // 8000 Hz
src.sr = 0x3;
src.bosr = 0;
}
else if (sample_rate_hz < (8021 + 32000) / 2)
{ // 8021 Hz
src.sr = 0xB;
src.bosr = 1;
}
else if (sample_rate_hz < (32000 + 44100) / 2)
{ // 32000 Hz
src.sr = 0x6;
src.bosr = 0;
}
else if (sample_rate_hz < (44100 + 48000) / 2)
{ // 44100 Hz
src.sr = 0x8;
src.bosr = 1;
}
else if (sample_rate_hz < (48000 + 88200) / 2)
{ // 48000 Hz
src.sr = 0x0;
src.bosr = 0;
}
else if (sample_rate_hz < (88200 + 96000) / 2)
{ // 88200 Hz
src.sr = 0xF;
src.bosr = 1;
}
else
{ // 96000 Hz
src.sr = 0x7;
src.bosr = 0;
}
break;
case 11289600:
src.usb = 0;
if (sample_rate_hz < (8021 + 22050) / 2)
{ // 8021 Hz
src.sr = 0xB;
src.bosr = 0;
}
else if (sample_rate_hz < (22050 + 88200) / 2)
{ // 22050, 44100 and 48000 Hz
src.sr = 0x8;
src.bosr = 0;
}
else
{ // 88200 Hz
src.sr = 0xF;
src.bosr = 0;
}
break;
case 18432000:
src.usb = 0;
src.sr = 0;
src.bosr = 1;
break;
default:
//Not supported
return;
}
aic23b_write_reg(AIC23B_SRC, src.data);
}
int main(void)
{
sysclk_init();
int i=0;
// board_init();
sysclk_enable_pba_module(SYSCLK_SPI);
// spi_reset(SPI_EXAMPLE);
// spi_set_master_mode(SPI_EXAMPLE);
// spi_disable_modfault(SPI_EXAMPLE);
// spi_disable_loopback(SPI_EXAMPLE);
// spi_set_chipselect(SPI_EXAMPLE,(1 << AVR32_SPI_MR_PCS_SIZE) - 1);
// spi_disable_variable_chipselect(SPI_EXAMPLE);
// spi_disable_chipselect_decoding(SPI_EXAMPLE);
// spi_set_delay(SPI_EXAMPLE,0);
// spi_set_chipselect_delay_bct(SPI_EXAMPLE,0,0);
// spi_set_chipselect_delay_bs(SPI_EXAMPLE,0,0);
// spi_set_bits_per_transfer(SPI_EXAMPLE,0, 8);
// spi_set_baudrate_register(SPI_EXAMPLE,0, getBaudDiv(1000000, sysclk_get_peripheral_bus_hz(SPI_EXAMPLE)));
// spi_enable_active_mode(SPI_EXAMPLE,0);
// spi_set_mode(SPI_EXAMPLE,0,SPI_MODE_0);
static const gpio_map_t SPI_GPIO_MAP = {
{AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION },
{AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION},
{AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION},
{AT45DBX_SPI_NPCS0_PIN, AT45DBX_SPI_NPCS0_FUNCTION },
// {AT45DBX_SPI_NPCS1_PIN, AT45DBX_SPI_NPCS1_FUNCTION },
};
// Assign GPIO to SPI.
gpio_enable_module(SPI_GPIO_MAP, sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0]));
spi_options_t spiOptions = {
.reg = 0,
.baudrate = 1000000,
.bits = 8,
.trans_delay = 0,
.spck_delay = 0,
.stay_act = 1,
.spi_mode = 0,
.modfdis = 1
};
// Initialize as master.
spi_initMaster(SPI_EXAMPLE, &spiOptions);
// Set SPI selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(SPI_EXAMPLE, 0, 0, 0);
// Enable SPI module.
spi_enable(SPI_EXAMPLE);
// spi_setupChipReg( SPI, &spiOptions, FPBA_HZ );
spi_setupChipReg(SPI_EXAMPLE, &spiOptions, sysclk_get_pba_hz() );
spi_enable(SPI_EXAMPLE);
while (true)
{
i++;
delay_ms(10);
// status = spi_at45dbx_mem_check();
spi_selectChip(SPI_EXAMPLE,0);
spi_put(SPI_EXAMPLE,i);
spi_unselectChip(SPI_EXAMPLE,0);
}
}
void bfin_get_param_desc(u16 paramIdx, volatile ParamDesc* pDesc) {
#if 1
#else
ParamValueCommon pval;
u16 x; // u16 for spi_read()
u8 i;
app_pause();
// command
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_GET_PARAM_DESC_COM);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// idx
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, paramIdx);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
// read label
for(i=0; i<PARAM_LABEL_LEN; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->label[i] = (char)(x & 0xff);
}
/*
//// don't need with new type system... didn't exactly need anyways
// read unit
for(i=0; i<PARAM_UNIT_LEN; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->unit[i] = (char)(x & 0xff);
}
*/
// read type
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->type = (U8)(x & 0xff);
// read min
for(i=0; i<4; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[i] = (u8)(x & 0xff);
}
pDesc->min = pval.asInt;
// read max
for(i=0; i<4; i++) {
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pval.asByte[i] = (u8)(x & 0xff);
}
pDesc->max = pval.asInt;
// read radix
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, 0); //dont care
spi_read(BFIN_SPI, &x);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
pDesc->radix = (u8)(x & 0xff);
app_resume();
#endif
}
static void tc_init_fast(volatile avr32_tc_t *tc)
{
// Options for waveform generation.
static const tc_waveform_opt_t waveform_opt_1 = {
.channel = FAST_TC_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA.
.acpa = TC_EVT_EFFECT_NOOP, //RA compare effect on TIOA.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset)
.enetrg = false, //// External event trigger enable.
.eevt = 0, //// External event selection.
.eevtedg = TC_SEL_NO_EDGE, //// External event edge selection.
.cpcdis = false, // Counter disable when RC compare.
.cpcstop = false, // Counter clock stopped with RC compare.
.burst = false, // Burst signal selection
.clki = false, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_TC3 // Internal source clock 3, connected to fPBA / 8.
};
// Options for enabling TC interrupts
static const tc_interrupt_t tc_interrupt = {
.etrgs = 0,
.ldrbs = 0,
.ldras = 0,
.cpcs = 1, // Enable interrupt on RC compare alone
.cpbs = 0,
.cpas = 0,
.lovrs = 0,
.covfs = 0
};
// Initialize the timer/counter.
tc_init_waveform(tc, &waveform_opt_1);
tc_write_rc(tc, FAST_TC_CHANNEL, 10);
// configure the timer interrupt
tc_configure_interrupts(tc, FAST_TC_CHANNEL, &tc_interrupt);
}
static void tc_init_slow(volatile avr32_tc_t *tc)
{
// Options for waveform generation.
static const tc_waveform_opt_t waveform_opt_2 = {
.channel = SLOW_TC_fast_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_CLEAR, // RC compare effect on TIOA.
.acpa = TC_EVT_EFFECT_SET, // RA compare effect on TIOA.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset)
.enetrg = false, // External event trigger enable.
.eevt = 0, // External event selection.
.eevtedg = TC_SEL_NO_EDGE, // External event edge selection.
.cpcdis = false, // Counter disable when RC compare.
.cpcstop = false, // Counter clock stopped with RC compare.
.burst = false, // Burst signal selection.
.clki = false, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_TC3 // Internal source clock 3, connected to fPBA / 8.
};
// Initialize the timer/counter.
tc_init_waveform(tc, &waveform_opt_2);
tc_write_rc(tc, SLOW_TC_fast_CHANNEL, 7500); //counter will count milliseconds
tc_write_ra(tc, SLOW_TC_fast_CHANNEL, 3500); //configure ra so that TIOA0 is toggled
static const tc_waveform_opt_t waveform_opt_3 = {
.channel = SLOW_TC_slow_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA.
.acpa = TC_EVT_EFFECT_NOOP, //RA compare effect on TIOA.
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER, //Waveform selection: Up mode with automatic trigger(reset)
.enetrg = false, //// External event trigger enable.
.eevt = 0, //// External event selection.
.eevtedg = TC_SEL_NO_EDGE, //// External event edge selection.
.cpcdis = false, // Counter disable when RC compare.
.cpcstop = false, // Counter clock stopped with RC compare.
.burst = false, // Burst signal selection.
.clki = false, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_XC0 // Use XC1 as clock source. Must configure TIOA0 to be XC1
};
tc_init_waveform(tc, &waveform_opt_3);
tc_write_rc(tc, SLOW_TC_slow_CHANNEL, 100); //
tc_select_external_clock(tc,SLOW_TC_slow_CHANNEL,AVR32_TC_BMR_TC0XC0S_TIOA1); //use TIOA1 as XC0
}
static void configure_hmatrix(uint32_t mode)
{
// Configure all Slave in Last Default Master
#if (defined AVR32_HMATRIX)
for(uint32_t i = 0; i < AVR32_HMATRIX_SLAVE_NUM; i++) {
AVR32_HMATRIX.SCFG[i].defmstr_type = mode;
}
#endif
#if (defined AVR32_HMATRIXB)
for(uint32_t i = 0;i < AVR32_HMATRIXB_SLAVE_NUM; i++) {
AVR32_HMATRIXB.SCFG[i].defmstr_type = mode;
}
#endif
}
void board_init(void)
{
/* This function is meant to contain board-specific initialization code
* for, e.g., the I/O pins. The initialization can rely on application-
* specific board configuration, found in conf_board.h.
*/
gpio_local_init();
static pcl_freq_param_t pcl_freq_param =
{
.cpu_f = CPU_SPEED,
.pba_f = PBA_SPEED,
.osc0_f = FOSC0,
.osc0_startup = OSC0_STARTUP
};
if (pcl_configure_clocks(&pcl_freq_param) != PASS)
while (true);
configure_hmatrix(AVR32_HMATRIXB_DEFMSTR_TYPE_NO_DEFAULT);
AVR32_LowLevelInit();
//configure all GPIO
gpio_local_enable_pin_output_driver(ADC_CONV_pin);
gpio_local_clr_gpio_pin(ADC_CONV_pin);
gpio_local_enable_pin_output_driver(DDS_IOUD_pin);
gpio_local_clr_gpio_pin(DDS_IOUD_pin);
gpio_local_enable_pin_output_driver(DDS_RESET_pin);
gpio_local_clr_gpio_pin(DDS_RESET_pin);
gpio_local_enable_pin_output_driver(DDS_PDN_pin);
gpio_local_set_gpio_pin(DDS_PDN_pin);
gpio_local_enable_pin_output_driver(DDS_P0_pin);
gpio_local_clr_gpio_pin(DDS_P0_pin);
gpio_local_enable_pin_output_driver(DDS_P1_pin);
gpio_local_clr_gpio_pin(DDS_P1_pin);
gpio_local_enable_pin_output_driver(DDS_P2_pin);
gpio_local_clr_gpio_pin(DDS_P2_pin);
gpio_local_enable_pin_output_driver(DDS_P3_pin);
gpio_local_clr_gpio_pin(DDS_P3_pin);
gpio_local_enable_pin_output_driver(RXSW_pin);
gpio_local_clr_gpio_pin(RXSW_pin);
gpio_local_enable_pin_output_driver(TXSW_pin);
gpio_local_clr_gpio_pin(TXSW_pin);
gpio_local_enable_pin_output_driver(TPAbias_pin);
gpio_local_clr_gpio_pin(TPAbias_pin);
gpio_local_enable_pin_output_driver(GEN1_pin);
gpio_local_clr_gpio_pin(GEN1_pin);
gpio_local_enable_pin_output_driver(GEN2_pin);
gpio_local_clr_gpio_pin(GEN2_pin);
gpio_local_enable_pin_output_driver(PWM0_pin);
gpio_local_clr_gpio_pin(PWM0_pin);
gpio_local_disable_pin_output_driver(SD_detect_pin);
//configure all peripheral IO
static const gpio_map_t GCLK_GPIO_MAP =
{
{AVR32_SCIF_GCLK_0_1_PIN, AVR32_SCIF_GCLK_0_1_FUNCTION}
};
gpio_enable_module(GCLK_GPIO_MAP,
sizeof(GCLK_GPIO_MAP) / sizeof(GCLK_GPIO_MAP[0]));
genclk_enable_config(9, GENCLK_SRC_CLK_CPU, 2);
static const gpio_map_t SPI_GPIO_MAP =
{
{SPI1_SCK_PIN, SPI1_SCK_FUNCTION},
{SPI1_MOSI_PIN, SPI1_MOSI_FUNCTION},
{SPI1_MISO_PIN, SPI1_MISO_FUNCTION},
{SPI1_NPCS2_PIN, SPI1_NPCS2_FUNCTION}
};
gpio_enable_module(SPI_GPIO_MAP,
sizeof(SPI_GPIO_MAP) / sizeof(SPI_GPIO_MAP[0]));
spi_options_t SPI1_OPTIONS_0 =
{
.reg = 0, //! The SPI channel to set up.
.baudrate = 30000000, //! Preferred baudrate for the SPI.
.bits =16, //! Number of bits in each character (8 to 16).
.spck_delay =0, //! Delay before first clock pulse after selecting slave (in PBA clock periods).
.trans_delay =0, //! Delay between each transfer/character (in PBA clock periods).
.stay_act =0, //! Sets this chip to stay active after last transfer to it.
.spi_mode =1, //! Which SPI mode to use when transmitting.
.modfdis =1 //! Disables the mode fault detection.
};
spi_options_t SPI1_OPTIONS_3 =
{
.reg = 3, //! The SPI channel to set up.
.baudrate = 30000000, //! Preferred baudrate for the SPI.
.bits =8, //! Number of bits in each character (8 to 16).
.spck_delay =0, //! Delay before first clock pulse after selecting slave (in PBA clock periods).
.trans_delay =0, //! Delay between each transfer/character (in PBA clock periods).
.stay_act =1, //! Sets this chip to stay active after last transfer to it.
.spi_mode =0, //! Which SPI mode to use when transmitting.
.modfdis =1 //! Disables the mode fault detection.
};
spi_initMaster(SPI1, &SPI1_OPTIONS_0);
spi_selectionMode(SPI1,1,0,0);
spi_enable(SPI1);
spi_setupChipReg(SPI1,&SPI1_OPTIONS_0,PBA_SPEED);
spi_setupChipReg(SPI1,&SPI1_OPTIONS_3,PBA_SPEED);
spi_selectChip(SPI1, 3);
static const gpio_map_t USB_USART_GPIO_MAP =
{
{USB_USART_RX_PIN, USB_USART_RX_FUNCTION},
{USB_USART_TX_PIN, USB_USART_TX_FUNCTION},
{USB_USART_RTS_PIN, USB_USART_RTS_FUNCTION},
{USB_USART_CTS_PIN, USB_USART_CTS_FUNCTION}
};
gpio_enable_module(USB_USART_GPIO_MAP,
sizeof(USB_USART_GPIO_MAP) / sizeof(USB_USART_GPIO_MAP[0]));
static const usart_options_t USB_USART_OPTIONS =
{
.baudrate = 3000000,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_hw_handshaking(USB_USART, &USB_USART_OPTIONS, PBA_SPEED);
static const gpio_map_t LCD_USART_GPIO_MAP =
{
{LCD_USART_RX_PIN, LCD_USART_RX_FUNCTION},
{LCD_USART_TX_PIN, LCD_USART_TX_FUNCTION}
};
gpio_enable_module(LCD_USART_GPIO_MAP,
sizeof(LCD_USART_GPIO_MAP) / sizeof(LCD_USART_GPIO_MAP[0]));
static const usart_options_t LCD_USART_OPTIONS =
{
.baudrate = 115200,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
usart_init_rs232(LCD_USART, &LCD_USART_OPTIONS, PBA_SPEED);
LCD_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received
LCD_USART->rtor=230; //set to timeout in 2ms
my_pdca_init_channel(LCD_USART_RX_PDCA_CHANNEL, (uint32_t)(&LCD_USART_buffer),(uint32_t)(sizeof(LCD_USART_buffer)),LCD_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE);
pdca_disable(LCD_USART_RX_PDCA_CHANNEL);
my_pdca_init_channel(USB_USART_RX_PDCA_CHANNEL, (uint32_t)(&host_USART_buffer),(uint32_t)(sizeof(host_USART_buffer)),USB_USART_RX_PDCA_PID,0,0, PDCA_TRANSFER_SIZE_BYTE);
pdca_disable(USB_USART_RX_PDCA_CHANNEL);
USB_USART->cr|=AVR32_USART_CR_STTTO_MASK; //set timeout to stop until new character is received
USB_USART->rtor=15000; //set to timeout in 1ms
// GPIO pins used for SD/MMC interface
static const gpio_map_t SD_MMC_SPI_GPIO_MAP =
{
{SPI0_SCK_PIN, SPI0_SCK_FUNCTION }, // SPI Clock.
{SPI0_MISO_PIN, SPI0_MISO_FUNCTION}, // MISO.
{SPI0_MOSI_PIN, SPI0_MOSI_FUNCTION}, // MOSI.
{SPI0_NPCS0_PIN, SPI0_NPCS0_FUNCTION} // Chip Select NPCS.
};
//SPI options.
spi_options_t SD_spiOptions =
{
.reg = SD_MMC_SPI_NPCS,
.baudrate = SD_SPI_SPEED, // Defined in conf_sd_mmc_spi.h.
.bits = 8, // Defined in conf_sd_mmc_spi.h.
.spck_delay = 0,
.trans_delay = 0,
.stay_act = 1,
.spi_mode = 0,
.modfdis = 1
};
// Assign I/Os to SPI.
gpio_enable_module(SD_MMC_SPI_GPIO_MAP,sizeof(SD_MMC_SPI_GPIO_MAP) / sizeof(SD_MMC_SPI_GPIO_MAP[0]));
// Initialize as master.
spi_initMaster(SPI0, &SD_spiOptions);
// Set SPI selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(SPI0, 0, 0, 0);
// Enable SPI module.
spi_enable(SPI0);
// Initialize SD/MMC driver with SPI clock (PBA).
sd_mmc_spi_init(SD_spiOptions, PBA_SPEED);
tc_init_fast(FAST_TC);
tc_init_slow(SLOW_TC);
static const gpio_map_t DACIFB_GPIO_MAP =
{
{AVR32_DACREF_PIN,AVR32_DACREF_FUNCTION},
{AVR32_ADCREFP_PIN,AVR32_ADCREFP_FUNCTION},
{AVR32_ADCREFN_PIN,AVR32_ADCREFN_FUNCTION},
{DAC0A_pin, DAC0A_FUNCTION},
{DAC1A_pin, DAC1A_FUNCTION}
};
gpio_enable_module(DACIFB_GPIO_MAP, sizeof(DACIFB_GPIO_MAP) / sizeof(DACIFB_GPIO_MAP[0]));
dacifb_opt_t dacifb_opt = {
.reference = DACIFB_REFERENCE_EXT , // VDDANA Reference
.channel_selection = DACIFB_CHANNEL_SELECTION_A, // Selection Channels A&B
.low_power = false, // Low Power Mode
.dual = false, // Dual Mode
.prescaler_clock_hz = DAC_PRESCALER_CLK // Prescaler Clock (Should be 500Khz)
};
// DAC Channel Configuration
dacifb_channel_opt_t dacifb_channel_opt = {
.auto_refresh_mode = true, // Auto Refresh Mode
.trigger_mode = DACIFB_TRIGGER_MODE_MANUAL, // Trigger selection
.left_adjustment = false, // Right Adjustment
.data_shift = 0, // Number of Data Shift
.data_round_enable = false // Data Rouding Mode };
};
volatile avr32_dacifb_t *dacifb0 = &AVR32_DACIFB0; // DACIFB IP registers address
volatile avr32_dacifb_t *dacifb1 = &AVR32_DACIFB1; // DACIFB IP registers address
//The factory calibration for DADIFB is broken, so use manual calibration
//dacifb_get_calibration_data(DAC0,&dacifb_opt,0);
dacifb_opt.gain_calibration_value=0x0090;
dacifb_opt.offset_calibration_value=0x0153;
// configure DACIFB0
dacifb_configure(DAC0,&dacifb_opt,PBA_SPEED);
dacifb_configure_channel(DAC0,DACIFB_CHANNEL_SELECTION_A,&dacifb_channel_opt,DAC_PRESCALER_CLK);
dacifb_start_channel(DAC0,DACIFB_CHANNEL_SELECTION_A,PBA_SPEED);
//The factory calibration for DADIFB is broken, so use manual calibration
dacifb_set_value(DAC0,DACIFB_CHANNEL_SELECTION_A,false,1024);
//dacifb_get_calibration_data(DAC1, &dacifb_opt,1);
dacifb_opt.gain_calibration_value=0x0084;
dacifb_opt.offset_calibration_value=0x0102;
// configure DACIFB1
dacifb_configure(DAC1,&dacifb_opt,PBA_SPEED);
dacifb_configure_channel(DAC1,DACIFB_CHANNEL_SELECTION_A,&dacifb_channel_opt,DAC_PRESCALER_CLK);
dacifb_start_channel(DAC1,DACIFB_CHANNEL_SELECTION_A,PBA_SPEED);
dacifb_set_value(DAC1,DACIFB_CHANNEL_SELECTION_A,false,1024);
DAC0->dr0=2048;
DAC1->dr0=4095;
}
void bfin_enable(void) {
// enable audio processing
spi_selectChip(BFIN_SPI, BFIN_SPI_NPCS);
spi_write(BFIN_SPI, MSG_ENABLE_AUDIO);
spi_unselectChip(BFIN_SPI, BFIN_SPI_NPCS);
}
