static int sf_disable_write(struct rtsx_chip *chip, u8 ins) { struct spi_info *spi = &(chip->spi); int retval; if (!spi->write_en) return STATUS_SUCCESS; rtsx_init_cmd(chip); rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, ins); rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_CA_NUMBER, 0xFF, SPI_COMMAND_BIT_8 | SPI_ADDRESS_BIT_24); rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_C_MODE0); rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, 100); if (retval < 0) { rtsx_clear_spi_error(chip); spi_set_err_code(chip, SPI_HW_ERR); rtsx_trace(chip); return STATUS_FAIL; } return STATUS_SUCCESS; }
static int sf_polling_status(struct rtsx_chip *chip, int msec) { int retval; rtsx_init_cmd(chip); rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_COMMAND, 0xFF, SPI_RDSR); rtsx_add_cmd(chip, WRITE_REG_CMD, SPI_TRANSFER0, 0xFF, SPI_TRANSFER0_START | SPI_POLLING_MODE0); rtsx_add_cmd(chip, CHECK_REG_CMD, SPI_TRANSFER0, SPI_TRANSFER0_END, SPI_TRANSFER0_END); retval = rtsx_send_cmd(chip, 0, msec); if (retval < 0) { rtsx_clear_spi_error(chip); spi_set_err_code(chip, SPI_BUSY_ERR); TRACE_RET(chip, STATUS_FAIL); } return STATUS_SUCCESS; }