/** * All application specific initializations are performed here. */ int main(void) { /* Random seed. Since both master and slave use os_ticks_get() * at the same time, both will use same seed and hence * will generate same random numbers in exact same sequence */ srand(os_ticks_get()); /* Initialize wmstdio console */ wmstdio_init(UART0_ID, 0); wmprintf("ssp_master_demo application Started\r\n"); /* Initialize SSP Driver */ ssp_drv_init(SSP_ID); /* Set SPI clock frequency (Optional) */ ssp_drv_set_clk(SSP_ID, 1000000); /* Configure SSP as SPI device. SSP0 is configured as master. */ ssp = ssp_drv_open(SSP_ID, SSP_FRAME_SPI, SSP_MASTER, DMA_DISABLE, -1, 0); /* Create the application thread */ return os_thread_create(&app_thread, /* thread handle */ "spi_demo", /* thread name */ ssp_master_write, /* entry function */ 0, /* argument */ &app_stack, /* stack */ OS_PRIO_2); /* priority - medium low */ }
mdev_t *ssp_drv_open(SSP_ID_Type ssp_id, SSP_FrameFormat_Type format, SSP_MS_Type mode, SSP_DMA dma, int cs, bool level) { int ret; SSP_CFG_Type sspCfgStruct; SSP_FIFO_Type sspFifoCfg; SPI_Param_Type spiParaStruct; SSP_NWK_Type sspNetworkCfg; PSP_Param_Type pspParaStruct; sspdev_data_t *ssp_data_p; mdev_t *mdev_p = mdev_get_handle(mdev_ssp_name[ssp_id]); ssp_data_p = (sspdev_data_t *) mdev_p->private_data; if (mdev_p == NULL) { SSP_LOG("Unable to open device %s\r\n", mdev_ssp_name[ssp_id]); return NULL; } ssp_data_p->slave = mode; ret = os_mutex_get(&ssp_mutex[mdev_p->port_id], OS_WAIT_FOREVER); if (ret == -WM_FAIL) { SSP_LOG("failed to get mutex\r\n"); return NULL; } /* If ringbuffer size is not set by user then set to default size */ if (GET_RX_BUF_SIZE(ssp_data_p) == 0) { SET_RX_BUF_SIZE(ssp_data_p, SSP_RX_BUF_SIZE); } if (rx_buf_init(ssp_data_p)) { SSP_LOG("Unable to allocate ssp software ring buffer\r\n"); return NULL; } /* If clk is not set by user then set it to default */ if (ssp_data_p->freq == 0) { ret = ssp_drv_set_clk(mdev_p->port_id, DEFAULT_SSP_FREQ); } /* Configure the pinmux for ssp pins */ if (cs >= 0 && mode == SSP_MASTER) { board_ssp_pin_config(mdev_p->port_id, 0); /* Use user specified chip select pin */ ssp_data_p->cs = cs; ssp_data_p->cs_level = level; GPIO_PinMuxFun(cs, PINMUX_FUNCTION_0); GPIO_SetPinDir(cs, GPIO_OUTPUT); /* Initially keep slave de-selected */ GPIO_WritePinOutput(cs, !level); } else { board_ssp_pin_config(mdev_p->port_id, 1); } /* Configure SSP interface */ sspCfgStruct.mode = SSP_NORMAL; sspCfgStruct.masterOrSlave = mode; sspCfgStruct.trMode = SSP_TR_MODE; sspCfgStruct.dataSize = SSP_DATASIZE_8; sspCfgStruct.sfrmPola = SSP_SAMEFRM_PSP; sspCfgStruct.slaveClkRunning = SSP_SLAVECLK_TRANSFER; sspCfgStruct.txd3StateEnable = ENABLE; /* RXFIFO inactivity timeout, [timeout = 100 / 26MHz] (Bus clock) */ sspCfgStruct.timeOutVal = 100; switch (format) { case SSP_FRAME_SPI: sspCfgStruct.frameFormat = SSP_FRAME_SPI; sspCfgStruct.txd3StateType = SSP_TXD3STATE_ELSB; break; case SSP_FRAME_PSP: sspCfgStruct.frameFormat = SSP_FRAME_PSP; sspCfgStruct.txd3StateType = SSP_TXD3STATE_12SLSB; break; case SSP_FRAME_SSP: SSP_LOG("Frame Format not implemented.\r\n"); return NULL; } /* Configure SSP Fifo */ sspFifoCfg.fifoPackMode = DISABLE; /* See if dma needs to be enabled */ if (dma == DMA_ENABLE) { /* Enable DMA controller clock */ CLK_ModuleClkEnable(CLK_DMAC); sspFifoCfg.rxFifoFullLevel = SSP_DMA_FIFO_RX_THRESHOLD; sspFifoCfg.txFifoEmptyLevel = SSP_DMA_FIFO_TX_THRESHOLD; sspFifoCfg.rxDmaService = ENABLE; sspFifoCfg.txDmaService = ENABLE; ssp_data_p->dma = 1; sspCfgStruct.trailByte = SSP_TRAILBYTE_DMA; } else { sspFifoCfg.rxFifoFullLevel = SSP_FIFO_RX_THRESHOLD; sspFifoCfg.txFifoEmptyLevel = SSP_FIFO_TX_THRESHOLD; sspFifoCfg.rxDmaService = DISABLE; sspFifoCfg.txDmaService = DISABLE; sspCfgStruct.trailByte = SSP_TRAILBYTE_CORE; } /* Let the settings take effect */ SSP_Disable(mdev_p->port_id); SSP_Init(mdev_p->port_id, &sspCfgStruct); SSP_FifoConfig(mdev_p->port_id, &sspFifoCfg); /* Do frame format config */ switch (format) { case SSP_FRAME_SPI: spiParaStruct.spiClkPhase = SPI_SCPHA_1; spiParaStruct.spiClkPolarity = SPI_SCPOL_LOW; SPI_Config(mdev_p->port_id, &spiParaStruct); break; case SSP_FRAME_PSP: pspParaStruct.pspFsrtType = 0; pspParaStruct.pspClkMode = PSP_DRIVFALL_SAMPRISE_IDLELOW; pspParaStruct.pspFrmPola = PSP_SFRMP_LOW; pspParaStruct.pspEndTransState = PSP_ENDTRANS_LOW; pspParaStruct.startDelay = 0; pspParaStruct.dummyStart = 0; pspParaStruct.dummyStop = 0; pspParaStruct.frmDelay = 0; pspParaStruct.frmLength = 8; PSP_Config(mdev_p->port_id, &pspParaStruct); sspNetworkCfg.frameRateDiv = 1; sspNetworkCfg.txTimeSlotActive = 3; sspNetworkCfg.rxTimeSlotActive = 3; SSP_NwkConfig(mdev_p->port_id, &sspNetworkCfg); break; case SSP_FRAME_SSP: SSP_LOG("Frame Format not implemented.\r\n"); return NULL; } /* Enable read interrupts only for slave when dma is disabled*/ if (mode == SSP_SLAVE && dma == DMA_DISABLE) { install_int_callback(SSP_INT_BASE + mdev_p->port_id, SSP_INT_RFFI, ssp_read_irq_handler[mdev_p->port_id]); NVIC_EnableIRQ(SSP_IRQn_BASE + mdev_p->port_id); NVIC_SetPriority(SSP_IRQn_BASE + mdev_p->port_id, 0xF); SSP_IntMask(mdev_p->port_id, SSP_INT_RFFI, UNMASK); } SSP_Enable(mdev_p->port_id); return mdev_p; }