static int eGon2_enter_standby(void)
{
	volatile int i;
//	__u8  power_int_status[5];
	//限制standby充电电流
	standby_get_dram_para();
	eGon2_config_charge_current(1);
	//设置VBUS充电不限流
//	eGon2_power_vbus_cur_limit();
//	//清除power的中断pending
//	eGon2_power_int_query(power_int_status);
	//处理中断
	//__debug("standby int init\n");
	standby_int_init();
	//处理clock
	standby_clock_store();
    #ifdef STANDBY_CHECK_CRC
    standby_before_check_crc();
    #endif
    #ifndef CONFIG_AW_FPGA_PLATFORM
	//处理dram,之后不允许再访问dram
	dram_power_save_process(&standby_dram_para);
	//禁止drampll输出使能
	standby_clock_drampll_ouput(0);
    #endif
	//切换到24M
	standby_clock_to_source(24000000);
    //__debug("after standby_clock_to_source\n");
	//关闭所有pll输出
	standby_clock_plldisable();
   // __debug("after standby_clock_plldisable\n");
    
	//降低电源电压输出
	eGon2_power_set_dcdc2(DCDC2_STANDBY_VOL);
    //__debug("after standby_clock_plldisable\n");
	//eGon2_power_set_dcdc3(DCDC3_STANDBY_VOL);
	//使能电源中断,等待唤醒
	eGon2_power_int_enable();
	//切换分频比全为0
	standby_clock_divsetto0();
    //__debug("after standby_clock_divsetto0 fail\n");
	//切换apb1到32k
	standby_clock_apb1_to_source(32000);
	//切换时钟,关闭时钟
	for(i=0;i<2000;i++);
	standby_clock_to_source(32000);
	//关闭24M晶振
	standby_clock_24m_op(0);
	return 0;
}
Example #2
0
/*
*********************************************************************************************************
*                                   STANDBY MAIN PROCESS ENTRY
*
* Description: standby main process entry.
*
* Arguments  : arg  pointer to the parameter that transfered from sys_pwm module.
*
* Returns    : none
*
* Note       :
*********************************************************************************************************
*/
int main(struct aw_pm_info *arg)
{
    char    *tmpPtr = (char *)&__bss_start;

    if(!arg){
        /* standby parameter is invalid */
        return -1;
    }

    /* flush data and instruction tlb, there is 32 items of data tlb and 32 items of instruction tlb,
       The TLB is normally allocated on a rotating basis. The oldest entry is always the next allocated */
    standby_flush_tlb();
    /* preload tlb for standby */
    standby_preload_tlb();

    /* clear bss segment */
    do{*tmpPtr ++ = 0;}while(tmpPtr <= (char *)&__bss_end);

    /* copy standby parameter from dram */
    standby_memcpy(&pm_info, arg, sizeof(pm_info));
    /* copy standby code & data to load tlb */
    standby_memcpy((char *)&__standby_end, (char *)&__standby_start, (char *)&__bss_end - (char *)&__bss_start);
    /* backup dram traning area */
    standby_memcpy((char *)dram_traning_area_back, (char *)DRAM_BASE_ADDR, sizeof(__u32)*DRAM_TRANING_SIZE);

    /* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
    /* init module before dram enter selfrefresh */
    /* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */

    /* initialise standby modules */
    standby_clk_init();
    standby_int_init();
    standby_tmr_init();
    standby_power_init();
    /* init some system wake source */
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_EXINT){
        standby_enable_int(INT_SOURCE_EXTNMI);
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_KEY){
        standby_key_init();
        standby_enable_int(INT_SOURCE_LRADC);
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_IR){
        standby_ir_init();
        standby_enable_int(INT_SOURCE_IR0);
        standby_enable_int(INT_SOURCE_IR1);
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_ALARM){
        //standby_alarm_init();???
        standby_enable_int(INT_SOURCE_ALARM);
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_USB){
        standby_usb_init();
        standby_enable_int(INT_SOURCE_USB0);
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_TIMEOFF){
        /* set timer for power off */
        if(pm_info.standby_para.time_off) {
            standby_tmr_set(pm_info.standby_para.time_off);
            standby_enable_int(INT_SOURCE_TIMER0);
        }
    }

    /* save stack pointer registger, switch stack to sram */
    sp_backup = save_sp();
    /* enable dram enter into self-refresh */
    dram_power_save_process();
    /* process standby */
    standby();
    /* enable watch-dog to preserve dram training failed */
    standby_tmr_enable_watchdog();
    /* restore dram */
    dram_power_up_process();
    /* disable watch-dog    */
    standby_tmr_disable_watchdog();

    /* restore stack pointer register, switch stack back to dram */
    restore_sp(sp_backup);

    /* exit standby module */
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_USB){
        standby_usb_exit();
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_IR){
        standby_ir_exit();
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_ALARM){
        //standby_alarm_exit();
    }
    if(pm_info.standby_para.event & SUSPEND_WAKEUP_SRC_KEY){
        standby_key_exit();
    }
    standby_power_exit();
    standby_tmr_exit();
    standby_int_exit();
    standby_clk_exit();

    /* restore dram traning area */
    standby_memcpy((char *)DRAM_BASE_ADDR, (char *)dram_traning_area_back, sizeof(__u32)*DRAM_TRANING_SIZE);

    /* report which wake source wakeup system */
    arg->standby_para.event = pm_info.standby_para.event;

    return 0;
}