/******************************************************************//**
* @brief
* Initialize all RTC module related hardware and register RTC device to kernel
*
* @details
*
* @note
*********************************************************************/
void rt_hw_rtc_init(void)
{
rt_uint32_t reset;
reset = RMU_ResetCauseGet();
// TODO: What is the current reset mode?
if (reset & RMU_RSTCAUSE_PORST || reset & RMU_RSTCAUSE_EXTRST)
{
RTC_Init_TypeDef rtcInit;
efm32_irq_hook_init_t hook;
rtcInit.enable = true;
rtcInit.debugRun = false;
rtcInit.comp0Top = false;
rtc_time = 0UL;
rt_kprintf("rtc is not configured\n");
rt_kprintf("please configure with set_date and set_time\n");
/* Configuring clocks in the Clock Management Unit (CMU) */
startLfxoForRtc();
/* Initialize and enable RTC */
RTC_Init(&rtcInit);
hook.type = efm32_irq_type_rtc;
hook.unit = 0;
hook.cbFunc = rt_hw_rtc_isr;
hook.userPtr = RT_NULL;
efm32_irq_hook_register(&hook);
/* Enabling Interrupt from RTC */
RTC_IntEnable(RTC_IFC_OF);
RTC_IntClear(RTC_IFC_OF);
NVIC_ClearPendingIRQ(RTC_IRQn);
NVIC_SetPriority(RTC_IRQn, EFM32_IRQ_PRI_DEFAULT);
NVIC_EnableIRQ(RTC_IRQn);
}
/* register rtc device */
rt_hw_rtc_register(&rtc, RT_RTC_NAME, EFM32_NO_DATA);
}
/**************************************************************************//**
* @brief Enables LFACLK and selects LFXO as clock source for RTC.
* Sets up the RTC to count at 1024 Hz.
* The counter should not be cleared on a compare match and keep running.
* Interrupts should be cleared and enabled.
* The counter should run.
*****************************************************************************/
error_t hw_timer_init(hwtimer_id_t timer_id, uint8_t frequency, timer_callback_t compare_callback, timer_callback_t overflow_callback)
{
if(timer_id >= HWTIMER_NUM)
return ESIZE;
if(timer_inited)
return EALREADY;
if(frequency != HWTIMER_FREQ_1MS && frequency != HWTIMER_FREQ_32K)
return EINVAL;
start_atomic();
compare_f = compare_callback;
overflow_f = overflow_callback;
timer_inited = true;
/* Configuring clocks in the Clock Management Unit (CMU) */
startLfxoForRtc(frequency);
RTC_Init_TypeDef rtcInit = RTC_INIT_DEFAULT;
rtcInit.enable = false; /* Don't enable RTC after init has run */
rtcInit.comp0Top = true; /* Clear counter on compare 0 match: cmp 0 is used to limit the value of the rtc to 0xffff */
rtcInit.debugRun = false; /* Counter shall not keep running during debug halt. */
/* Initialize the RTC */
RTC_Init(&rtcInit);
//disable all rtc interrupts while we're still configuring
RTC_IntDisable(RTC_IEN_OF | RTC_IEN_COMP0 | RTC_IEN_COMP1);
RTC_IntClear(RTC_IFC_OF | RTC_IFC_COMP0 | RTC_IFC_COMP1);
//Set maximum value for the RTC
RTC_CompareSet( 0, 0x0000FFFF );
RTC_CounterReset();
RTC_IntEnable(RTC_IEN_COMP0);
NVIC_EnableIRQ(RTC_IRQn);
RTC_Enable(true);
end_atomic();
return SUCCESS;
}
