Example #1
0
static void m6502_state_register(const char *type)
{
	int cpu = cpu_getactivecpu();

	state_save_register_UINT16(type, cpu, "PC", &m6502.pc.w.l, 2);
	state_save_register_UINT16(type, cpu, "SP", &m6502.sp.w.l, 2);
	state_save_register_UINT8 (type, cpu, "P", &m6502.p, 1);
	state_save_register_UINT8 (type, cpu, "A", &m6502.a, 1);
	state_save_register_UINT8 (type, cpu, "X", &m6502.x, 1);
	state_save_register_UINT8 (type, cpu, "Y", &m6502.y, 1);
	state_save_register_UINT8 (type, cpu, "pending", &m6502.pending_irq, 1);
	state_save_register_UINT8 (type, cpu, "after_cli", &m6502.after_cli, 1);
	state_save_register_UINT8 (type, cpu, "nmi_state", &m6502.nmi_state, 1);
	state_save_register_UINT8 (type, cpu, "irq_state", &m6502.irq_state, 1);
	state_save_register_UINT8 (type, cpu, "so_state", &m6502.so_state, 1);
}
Example #2
0
void pic16C5x_init(void)
{
	int cpu = cpu_getactivecpu();

	state_save_register_INT8("pic16C5x", cpu, "Old_Data", &old_data, 1);
	state_save_register_UINT8("pic16C5x", cpu, "W", &R.W, 1);
	state_save_register_UINT8("pic16C5x", cpu, "ALU", &R.ALU, 1);
	state_save_register_UINT8("pic16C5x", cpu, "Option", &R.OPTION, 1);
	state_save_register_UINT8("pic16C5x", cpu, "TRISA", &R.TRISA, 1);
	state_save_register_UINT8("pic16C5x", cpu, "TRISB", &R.TRISB, 1);
	state_save_register_UINT8("pic16C5x", cpu, "TRISC", &R.TRISC, 1);
	state_save_register_UINT8("pic16C5x", cpu, "PORTA", &R.PORTA, 1);
	state_save_register_UINT8("pic16C5x", cpu, "PORTB", &R.PORTB, 1);
	state_save_register_UINT8("pic16C5x", cpu, "PORTC", &R.PORTC, 1);
	state_save_register_UINT8("pic16C5x", cpu, "Old_T0", &old_T0, 1);
	state_save_register_UINT8("pic16C5x", cpu, "STR", &R.STATUS, 1);
	state_save_register_UINT8("pic16C5x", cpu, "RAM_mask", &picRAMmask, 1);
	state_save_register_UINT16("pic16C5x", cpu, "WDT", &R.WDT, 1);
	state_save_register_UINT16("pic16C5x", cpu, "Prescaler", &R.prescaler, 1);
	state_save_register_UINT16("pic16C5x", cpu, "Stack0", &R.STACK[0], 1);
	state_save_register_UINT16("pic16C5x", cpu, "Stack1", &R.STACK[1], 1);
	state_save_register_UINT16("pic16C5x", cpu, "PC", &R.PC, 1);
	state_save_register_UINT16("pic16C5x", cpu, "PrevPC", &R.PREVPC, 1);
	state_save_register_UINT16("pic16C5x", cpu, "Config", &R.CONFIG, 1);
	state_save_register_UINT32("pic16C5x", cpu, "Opcode", &R.opcode.d, 1);
	state_save_register_INT32("pic16C5x", cpu, "Delay_Timer", &delay_timer, 1);
	state_save_register_INT32("pic16C5x", cpu, "PIC_model", &picmodel, 1);
	state_save_register_INT32("pic16C5x", cpu, "Reset_Vector", &pic16C5x_reset_vector, 1);
}
Example #3
0
ROM_END

static DRIVER_INIT( gijoe )
{
	konami_rom_deinterleave_2(REGION_GFX1);
	konami_rom_deinterleave_4(REGION_GFX2);

	state_save_register_UINT16("main", 0, "control2", &cur_control2, 1);

	dmadelay_timer = timer_alloc(dmaend_callback);
}
Example #4
0
ROM_END


static DRIVER_INIT( ninjaw )
{
	cpua_ctrl = 0xff;
	state_save_register_UINT16("main1", 0, "control", &cpua_ctrl, 1);
	state_save_register_func_postload(parse_control);

	state_save_register_int("sound1", 0, "sound region", &banknum);
	state_save_register_func_postload(reset_sound_region);
}
Example #5
0
int volfied_vh_start (void)
{
	pixel_layer = bitmap_alloc(Machine->drv->screen_width, Machine->drv->screen_height);
	if (pixel_layer == NULL)
		return 1;

	line_dirty = malloc(256);
	if (line_dirty == NULL)
		return 1;

	video_ram = malloc(0x40000 * sizeof (UINT16));
	if (video_ram == NULL)
		return 1;

	state_save_register_UINT16("volfied", 0, "video_ram",     video_ram,     0x40000);
	state_save_register_UINT16("volfied", 0, "video_ctrl",    &video_ctrl,   1);
	state_save_register_UINT16("volfied", 0, "video_mask",    &video_mask,   1);
	state_save_register_UINT16("volfied", 0, "sprite_ctrl",   &sprite_ctrl,  1);
	state_save_register_UINT16("volfied", 0, "sprite_flip",   &sprite_flip,  1);

	state_save_register_func_postload (mark_all_dirty);

	return 0;
}
Example #6
0
int ide_controller_init_custom(int which, struct ide_interface *intf, struct chd_file *diskhandle)
{
	struct ide_state *ide = &idestate[which];
	const struct hard_disk_info *hdinfo;

	/* NULL interface is immediate failure */
	if (!intf)
		return 1;

	/* reset the IDE state */
	memset(ide, 0, sizeof(*ide));
	ide->intf = intf;

	/* set MAME harddisk handle */
	ide->disk = hard_disk_open(diskhandle);

	/* get and copy the geometry */
	if (ide->disk)
	{
		hdinfo = hard_disk_get_info(ide->disk);
		ide->num_cylinders = hdinfo->cylinders;
		ide->num_sectors = hdinfo->sectors;
		ide->num_heads = hdinfo->heads;
		if (hdinfo->sectorbytes != IDE_DISK_SECTOR_SIZE)
			/* wrong sector len */
			return 1;
#if PRINTF_IDE_COMMANDS
		printf("CHS: %d %d %d\n", ide->num_cylinders, ide->num_heads, ide->num_sectors);
#endif
	}

	/* build the features page */
	ide_build_features(ide);

	/* create a timer for timing status */
	ide->last_status_timer = timer_alloc(NULL);
	ide->reset_timer = timer_alloc(reset_callback);

	/* register ide status */
	state_save_register_UINT8 ("ide", which, "adapter_control",        &ide->adapter_control,       1);
	state_save_register_UINT8 ("ide", which, "status",                 &ide->status,                1);
	state_save_register_UINT8 ("ide", which, "error",                  &ide->error,                 1);
	state_save_register_UINT8 ("ide", which, "command",                &ide->command,               1);
	state_save_register_UINT8 ("ide", which, "interrupt_pending",      &ide->interrupt_pending,     1);
	state_save_register_UINT8 ("ide", which, "precomp_offset",         &ide->precomp_offset,        1);

	state_save_register_UINT8 ("ide", which, "buffer",                 ide->buffer,                 IDE_DISK_SECTOR_SIZE);
	state_save_register_UINT8 ("ide", which, "features",               ide->features,               IDE_DISK_SECTOR_SIZE);
	state_save_register_UINT16("ide", which, "buffer_offset",          &ide->buffer_offset,         1);
	state_save_register_UINT16("ide", which, "sector_count",           &ide->sector_count,          1);

	state_save_register_UINT16("ide", which, "block_count",            &ide->block_count,           1);
	state_save_register_UINT16("ide", which, "sectors_until_int",      &ide->sectors_until_int,     1);

	state_save_register_UINT8 ("ide", which, "dma_active",             &ide->dma_active,            1);
	state_save_register_UINT8 ("ide", which, "dma_cpu",                &ide->dma_cpu,               1);
	state_save_register_UINT8 ("ide", which, "dma_address_xor",        &ide->dma_address_xor,       1);
	state_save_register_UINT8 ("ide", which, "dma_last_buffer",        &ide->dma_last_buffer,       1);
	state_save_register_UINT32("ide", which, "dma_address",            &ide->dma_address,           1);
	state_save_register_UINT32("ide", which, "dma_descriptor",         &ide->dma_descriptor,        1);
	state_save_register_UINT32("ide", which, "dma_bytes_left",         &ide->dma_bytes_left,        1);

	state_save_register_UINT8 ("ide", which, "bus_master_command",     &ide->bus_master_command,    1);
	state_save_register_UINT8 ("ide", which, "bus_master_status",      &ide->bus_master_status,     1);
	state_save_register_UINT32("ide", which, "bus_master_descriptor",  &ide->bus_master_descriptor, 1);

	state_save_register_UINT16("ide", which, "cur_cylinder",           &ide->cur_cylinder,          1);
	state_save_register_UINT8 ("ide", which, "cur_sector",             &ide->cur_sector,            1);
	state_save_register_UINT8 ("ide", which, "cur_head",               &ide->cur_head,              1);
	state_save_register_UINT8 ("ide", which, "cur_head_reg",           &ide->cur_head_reg,          1);

	state_save_register_UINT32("ide", which, "cur_lba",                &ide->cur_lba,               1);

	state_save_register_UINT16("ide", which, "num_cylinders",          &ide->num_cylinders,         1);
	state_save_register_UINT8 ("ide", which, "num_sectors",            &ide->num_sectors,           1);
	state_save_register_UINT8 ("ide", which, "num_heads",              &ide->num_heads,             1);

	state_save_register_UINT8 ("ide", which, "config_unknown",         &ide->config_unknown,        1);
	state_save_register_UINT8 ("ide", which, "config_register",        ide->config_register,        IDE_CONFIG_REGISTERS);
	state_save_register_UINT8 ("ide", which, "config_register_num",    &ide->config_register_num,   1);

	state_save_register_int   ("ide", which, "master_password_enable", &ide->master_password_enable);
	state_save_register_int   ("ide", which, "user_password_enable",   &ide->user_password_enable);

	return 0;
}
Example #7
0
/* Generate interrupts */
static void Interrupt(void)
{
	/* the 6805 latches interrupt requests internally, so we don't clear */
	/* pending_interrupts until the interrupt is taken, no matter what the */
	/* external IRQ pin does. */

#if (HAS_HD63705)
	if( (m6805.pending_interrupts & (1<<HD63705_INT_NMI)) != 0)
	{
		PUSHWORD(m6805.pc);
		PUSHBYTE(m6805.x);
		PUSHBYTE(m6805.a);
		PUSHBYTE(m6805.cc);
        SEI;
		/* no vectors supported, just do the callback to clear irq_state if needed */
		if (m6805.irq_callback)
			(*m6805.irq_callback)(0);

		RM16( 0x1ffc, &pPC);
		change_pc(PC);
		m6805.pending_interrupts &= ~(1<<HD63705_INT_NMI);

		m6805_ICount -= 11;

	}
	else if( (m6805.pending_interrupts & ((1<<M6805_IRQ_LINE)|HD63705_INT_MASK)) != 0 ) {
		if ( (CC & IFLAG) == 0 ) {
#else
	if( (m6805.pending_interrupts & (1<<M6805_IRQ_LINE)) != 0 ) {
		if ( (CC & IFLAG) == 0 ) {
#endif
	{
        /* standard IRQ */
/*#if (HAS_HD63705) */
/*      if(SUBTYPE!=SUBTYPE_HD63705) */
/*#endif */
/*          PC |= ~AMASK; */
		PUSHWORD(m6805.pc);
		PUSHBYTE(m6805.x);
		PUSHBYTE(m6805.a);
		PUSHBYTE(m6805.cc);
        SEI;
		/* no vectors supported, just do the callback to clear irq_state if needed */
		if (m6805.irq_callback)
			(*m6805.irq_callback)(0);


#if (HAS_HD63705)
		if(SUBTYPE==SUBTYPE_HD63705)
		{
			/* Need to add emulation of other interrupt sources here KW-2/4/99 */
			/* This is just a quick patch for Namco System 2 operation         */

			if((m6805.pending_interrupts&(1<<HD63705_INT_IRQ1))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_IRQ1);
				RM16( 0x1ff8, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_IRQ2))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_IRQ2);
				RM16( 0x1fec, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_ADCONV))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_ADCONV);
				RM16( 0x1fea, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_TIMER1))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_TIMER1);
				RM16( 0x1ff6, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_TIMER2))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_TIMER2);
				RM16( 0x1ff4, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_TIMER3))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_TIMER3);
				RM16( 0x1ff2, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_PCI))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_PCI);
				RM16( 0x1ff0, &pPC);
				change_pc(PC);
			}
			else if((m6805.pending_interrupts&(1<<HD63705_INT_SCI))!=0)
			{
				m6805.pending_interrupts &= ~(1<<HD63705_INT_SCI);
				RM16( 0x1fee, &pPC);
				change_pc(PC);
			}
		}
		else
#endif
		{
			RM16( 0xffff - 5, &pPC );
			change_pc(PC);
		}

		}	/* CC & IFLAG */
			m6805.pending_interrupts &= ~(1<<M6805_IRQ_LINE);
		}
		m6805_ICount -= 11;
	}
}

static void state_register(const char *type)
{
	int cpu = cpu_getactivecpu();
	state_save_register_UINT8(type, cpu, "A", &A, 1);
	state_save_register_UINT16(type, cpu, "PC", &PC, 1);
	state_save_register_UINT16(type, cpu, "S", &S, 1);
	state_save_register_UINT8(type, cpu, "X", &X, 1);
	state_save_register_UINT8(type, cpu, "CC", &CC, 1);
	state_save_register_UINT16(type, cpu, "PENDING", &m6805.pending_interrupts, 1);
	state_save_register_INT32(type, cpu, "IRQ_STATE", &m6805.irq_state[0], 1);
}

static void m6805_init(void)
{
	state_register("m6805");
}
Example #8
0
static int TMS9928A_start (const TMS9928a_interface *intf) {
    /* 4, 8 or 16 kB vram please */
    if (! ((intf->vram == 0x1000) || (intf->vram == 0x2000) || (intf->vram == 0x4000)) )
        return 1;

    tms.model = intf->model;

	tms.top_border = TMS_50HZ ? TOP_BORDER_50HZ : TOP_BORDER_60HZ;
	tms.bottom_border = TMS_50HZ ? BOTTOM_BORDER_50HZ : BOTTOM_BORDER_60HZ;

	tms.INTCallback = intf->int_callback;

    /* Video RAM */
    tms.vramsize = intf->vram;
    tms.vMem = (UINT8*) auto_malloc (intf->vram);
    if (!tms.vMem)
		return 1;
    memset (tms.vMem, 0, intf->vram);

    /* Sprite back buffer */
    tms.dBackMem = (UINT8*)auto_malloc (IMAGE_SIZE);
    if (!tms.dBackMem)
        return 1;

    /* dirty buffers */
    tms.DirtyName = (char*)auto_malloc (MAX_DIRTY_NAME);
    if (!tms.DirtyName)
        return 1;

    tms.DirtyPattern = (char*)auto_malloc (MAX_DIRTY_PATTERN);
    if (!tms.DirtyPattern)
        return 1;

    tms.DirtyColour = (char*)auto_malloc (MAX_DIRTY_COLOUR);
    if (!tms.DirtyColour)
        return 1;

    /* back bitmap */
    tms.tmpbmp = auto_bitmap_alloc (256, 192);
    if (!tms.tmpbmp)
        return 1;

    TMS9928A_reset ();
    tms.LimitSprites = 1;

	state_save_register_UINT8 ("tms9928a", 0, "R0", &tms.Regs[0], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R1", &tms.Regs[1], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R2", &tms.Regs[2], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R3", &tms.Regs[3], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R4", &tms.Regs[4], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R5", &tms.Regs[5], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R6", &tms.Regs[6], 1);
	state_save_register_UINT8 ("tms9928a", 0, "R7", &tms.Regs[7], 1);
	state_save_register_UINT8 ("tms9928a", 0, "S", &tms.StatusReg, 1);
	state_save_register_UINT8 ("tms9928a", 0, "read_ahead", &tms.ReadAhead, 1);
	state_save_register_UINT8 ("tms9928a", 0, "first_byte", &tms.FirstByte, 1);
	state_save_register_UINT8 ("tms9928a", 0, "latch", &tms.latch, 1);
	state_save_register_UINT16 ("tms9928a", 0, "vram_latch", (UINT16*)&tms.Addr, 1);
	state_save_register_UINT8 ("tms9928a", 0, "interrupt_line", &tms.INT, 1);
	state_save_register_UINT8 ("tms9928a", 0, "VRAM", tms.vMem, intf->vram);

    return 0;
}
Example #9
0
int TMS9928A_start(int which, int model, unsigned int vram) {
	/* 4 or 16 kB vram please */
	if (! ((vram == 0x1000) || (vram == 0x4000) || (vram == 0x2000)) )
		return 1;

	tms[which].model = model;

	/* Video RAM */
	tms[which].vramsize = vram;
	tms[which].vMem = (UINT8*) malloc (vram);
	if (!tms[which].vMem) return (1);
	memset (tms[which].vMem, 0, vram);

	/* Sprite back buffer */
	tms[which].dBackMem = (UINT8*)malloc (IMAGE_SIZE);
	if (!tms[which].dBackMem) {
		free (tms[which].vMem);
		return 1;
	}

	/* dirty buffers */
	tms[which].DirtyName = (char*)malloc (MAX_DIRTY_NAME);
	if (!tms[which].DirtyName) {
		free (tms[which].vMem);
		free (tms[which].dBackMem);
		return 1;
	}

	tms[which].DirtyPattern = (char*)malloc (MAX_DIRTY_PATTERN);
	if (!tms[which].DirtyPattern) {
		free (tms[which].vMem);
		free (tms[which].DirtyName);
		free (tms[which].dBackMem);
		return 1;
	}

	tms[which].DirtyColour = (char*)malloc (MAX_DIRTY_COLOUR);
	if (!tms[which].DirtyColour) {
		free (tms[which].vMem);
		free (tms[which].DirtyName);
		free (tms[which].DirtyPattern);
		free (tms[which].dBackMem);
		return 1;
	}

	/* back bitmap */
	tms[which].tmpbmp = bitmap_alloc (256, 192);
	if (!tms[which].tmpbmp) {
		free (tms[which].vMem);
		free (tms[which].dBackMem);
		free (tms[which].DirtyName);
		free (tms[which].DirtyPattern);
		free (tms[which].DirtyColour);
		return 1;
	}

	/* sprite bitmap */
	tms[which].tmpsbmp = bitmap_alloc (256, 192);
	if (!tms[which].tmpsbmp) {
		free (tms[which].vMem);
		free (tms[which].dBackMem);
		free (tms[which].DirtyName);
		free (tms[which].DirtyPattern);
		free (tms[which].DirtyColour);
		return 1;
	}

	TMS9928A_reset (which);
	tms[which].LimitSprites = 1;

	state_save_register_UINT8 ("tms9928a", which, "R0", &tms[which].Regs[0], 1);
	state_save_register_UINT8 ("tms9928a", which, "R1", &tms[which].Regs[1], 1);
	state_save_register_UINT8 ("tms9928a", which, "R2", &tms[which].Regs[2], 1);
	state_save_register_UINT8 ("tms9928a", which, "R3", &tms[which].Regs[3], 1);
	state_save_register_UINT8 ("tms9928a", which, "R4", &tms[which].Regs[4], 1);
	state_save_register_UINT8 ("tms9928a", which, "R5", &tms[which].Regs[5], 1);
	state_save_register_UINT8 ("tms9928a", which, "R6", &tms[which].Regs[6], 1);
	state_save_register_UINT8 ("tms9928a", which, "R7", &tms[which].Regs[7], 1);
	state_save_register_UINT8 ("tms9928a", which, "S", &tms[which].StatusReg, 1);
	state_save_register_UINT8 ("tms9928a", which, "read_ahead", &tms[which].ReadAhead, 1);
	state_save_register_UINT8 ("tms9928a", which, "first_byte", &tms[which].FirstByte, 1);
	state_save_register_UINT8 ("tms9928a", which, "latch", &tms[which].latch, 1);
	state_save_register_UINT16 ("tms9928a", which, "vram_latch", (UINT16*)&tms[which].Addr, 1);
	state_save_register_UINT8 ("tms9928a", which, "interrupt_line", &tms[which].INT, 1);
	state_save_register_UINT8 ("tms9928a", which, "VRAM", tms[which].vMem, vram);
	return 0;
}
Example #10
0
int PSX_sh_start( const struct MachineSound *msound )
{
	int n_effect;
	int n_channel;

	m_p_n_ram = memory_region( REGION_CPU1 );
	m_n_ramsize = memory_region_length( REGION_CPU1 ) - 1;

	m_n_mainvolumeleft = 0;
	m_n_mainvolumeright = 0;
	m_n_reverberationdepthleft = 0;
	m_n_reverberationdepthright = 0;
	m_n_voiceon = 0;
	m_n_voiceoff = 0;
	m_n_modulationmode = 0;
	m_n_noisemode = 0;
	m_n_reverbmode = 0;
	m_n_channelonoff = 0;
	m_n_reverbworkareastart = 0;
	m_n_irqaddress = 0;
	m_n_spudata = 0;
	m_n_spucontrol = 0;
	m_n_spustatus = 0;
	m_n_cdvolumeleft = 0;
	m_n_cdvolumeright = 0;
	m_n_externalvolumeleft = 0;
	m_n_externalvolumeright = 0;

	for( n_channel = 0; n_channel < 24; n_channel++ )
	{
		m_p_n_volumeleft[ n_channel ] = 0;
		m_p_n_volumeright[ n_channel ] = 0;
		m_p_n_pitch[ n_channel ] = 0;
		m_p_n_address[ n_channel ] = 0;
		m_p_n_attackdecaysustain[ n_channel ] = 0;
		m_p_n_sustainrelease[ n_channel ] = 0;
		m_p_n_adsrvolume[ n_channel ] = 0;
		m_p_n_repeataddress[ n_channel ] = 0;
	}

	for( n_effect = 0; n_effect < 16; n_effect++ )
	{
		m_p_n_effect[ n_effect ] = 0;
	}

	m_p_n_spuram = malloc( 0x80000 );
	if( m_p_n_spuram == NULL )
	{
		return 1;
	}

	state_save_register_UINT16( "psx", 0, "m_n_mainvolumeleft", &m_n_mainvolumeleft, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_mainvolumeright", &m_n_mainvolumeright, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_reverberationdepthleft", &m_n_reverberationdepthleft, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_reverberationdepthright", &m_n_reverberationdepthright, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_reverberationdepthleft", &m_n_reverberationdepthleft, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_reverberationdepthright", &m_n_reverberationdepthright, 1 );
	state_save_register_UINT32( "psx", 0, "m_n_voiceon", &m_n_voiceon, 1 );
	state_save_register_UINT32( "psx", 0, "m_n_voiceoff", &m_n_voiceoff, 1 );
	state_save_register_UINT32( "psx", 0, "m_n_modulationmode", &m_n_modulationmode, 1 );
	state_save_register_UINT32( "psx", 0, "m_n_noisemode", &m_n_noisemode, 1 );
	state_save_register_UINT32( "psx", 0, "m_n_reverbmode", &m_n_reverbmode, 1 );
	state_save_register_UINT32( "psx", 0, "m_n_channelonoff", &m_n_channelonoff, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_reverbworkareastart", &m_n_reverbworkareastart, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_irqaddress", &m_n_irqaddress, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_spudata", &m_n_spudata, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_spucontrol", &m_n_spucontrol, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_spustatus", &m_n_spustatus, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_cdvolumeleft", &m_n_cdvolumeleft, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_cdvolumeright", &m_n_cdvolumeright, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_externalvolumeleft", &m_n_externalvolumeleft, 1 );
	state_save_register_UINT16( "psx", 0, "m_n_externalvolumeright", &m_n_externalvolumeright, 1 );
	state_save_register_UINT16( "psx", 0, "m_p_n_volumeleft", m_p_n_volumeleft, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_volumeright", m_p_n_volumeright, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_pitch", m_p_n_pitch, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_address", m_p_n_address, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_attackdecaysustain", m_p_n_attackdecaysustain, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_sustainrelease", m_p_n_sustainrelease, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_adsrvolume", m_p_n_adsrvolume, 24 );
	state_save_register_UINT16( "psx", 0, "m_p_n_repeataddress", m_p_n_repeataddress, 24 );
	state_save_register_UINT32( "psx", 0, "m_p_n_effect", m_p_n_effect, 16 );
	state_save_register_UINT32( "psx", 0, "m_p_n_spuram", m_p_n_spuram, 0x80000 / 4 );

	psx_dma_install_read_handler( 4, spu_read );
	psx_dma_install_write_handler( 4, spu_write );

	return 0;
}