/* ************************************************************************************************************ * * function * * name : * * parmeters : * * return : * * note : * * ************************************************************************************************************ */ int main(void) { __s32 dram_size=0; timer_init(); //serial init sunxi_serial_init(fes1_head.prvt_head.uart_port, (void *)fes1_head.prvt_head.uart_ctrl, 2); set_pll(); //enable gpio gate set_gpio_gate(); //dram init printf("beign to init dram\n"); #ifdef FPGA_PLATFORM dram_size = mctl_init((void *)fes1_head.prvt_head.dram_para); #else dram_size = init_DRAM(0, (void *)fes1_head.prvt_head.dram_para); #endif if (dram_size) { note_dram_log(1); printf("init dram ok\n"); } else { note_dram_log(0); printf("init dram fail\n"); } __msdelay(10); return dram_size; }
/* ************************************************************************************************************ * * function * * name : * * parmeters : * * return : * * note : * * ************************************************************************************************************ */ int main(void) { __s32 dram_size=0; timer_init(); #ifdef CONFIG_ARCH_SUN9IW1P1 if(readl(CCM_PLL1_C0_CTRL)) { set_pll(); } #elif defined(CONFIG_ARCH_SUN8IW6P1) if(readl(CCMU_PLL_C0CPUX_CTRL_REG)) { set_pll(); } #else set_pll(); #endif //serial init sunxi_serial_init(fes1_head.prvt_head.uart_port, (void *)fes1_head.prvt_head.uart_ctrl, 2); //enable gpio gate set_gpio_gate(); //dram init printf("beign to init dram\n"); dram_size = init_DRAM(0, (void *)fes1_head.prvt_head.dram_para); if (dram_size) { note_dram_log(1); printf("init dram ok\n"); } else { note_dram_log(0); printf("init dram fail\n"); } __msdelay(10); return dram_size; }
void sbromsw_entry(void) { toc0_private_head_t *toc0 = (toc0_private_head_t *)CONFIG_SBROMSW_BASE; uint dram_size; int ret, flag; timer_init(); set_pll(); sunxi_serial_init(toc0_config->uart_port, toc0_config->uart_ctrl, 2); printf("try to probe rtc region\n"); flag = rtc_region_probe_fel_flag(); printf("flag=0x%x\n", flag); if(flag == SUNXI_RUN_EFEX_FLAG) { printf("sbromsw_entry sbromsw_probe_fel_flag\n"); rtc_region_clear_fel_flag(); goto __sbromsw_entry_err0; } #ifdef CONFIG_BOOT_A15 // printf("toc0_config->boot_cpu=0x%x\n", toc0_config->boot_cpu); // if(toc0_config->boot_cpu) // { // flag = BOOT_A7_FLAG; // } // else // { // flag = BOOT_A15_FLAG; // } /* boot_cpu 含义 bit0~7 bit8~15 0:不需要保存标志位 1:当前应该切换a15启动 1:通知u-boot保存 0:当前应该切换a7启动 每次从brom读取的boot_cpu只能是0x100或者0 */ if(flag == BOOT_A15_FLAG) { rtc_region_clear_fel_flag(); if(toc0_config->boot_cpu == 0x00) toc0_config->boot_cpu = 0x101; //a15启动,需要保存标志位 switch_to_a15(toc0_config->pwr_en); } else if(flag == BOOT_A7_FLAG) { rtc_region_clear_fel_flag(); if(toc0_config->boot_cpu == 0x100) //如果原本是a15启动 toc0_config->boot_cpu = 0x01; //a7启动,需要保存标志位 } else { if(toc0_config->boot_cpu == 0x100) { switch_to_a15(toc0_config->pwr_en); //a15启动,不需要保存标志位 } else { toc0_config->boot_cpu = 0x0; //a7启动,不需要保存标志位 } } //printf("toc0_config->boot_cpu=0x%x\n", toc0_config->boot_cpu); #endif printf("try to setup mmu\n"); //mmu init mmu_setup(); printf("mmu setup ok\n"); //dram init printf("try to init dram\n"); dram_size = init_DRAM(0, (void *)toc0_config->dram_para); if (dram_size) { printf("init dram ok, size=%dM\n", dram_size); } else { printf("init dram fail\n"); goto __sbromsw_entry_err; } printf("init heap\n"); create_heap(CONFIG_HEAP_BASE, CONFIG_HEAP_SIZE); printf("init gic\n"); gic_init(); printf("init flash\n"); ret = sunxi_flash_init(toc0->platform[0] & 0x0f); //初始化外部介质,准备读取TOC1数据 if(ret) { printf("sbromsw_entry sunxi_flash_init failed\n"); goto __sbromsw_entry_err; } ret = toc1_init(); //TOC1初始化,判断TOC1的头部是否合格 if(ret) { printf("sbromsw_entry toc1_init failed\n"); goto __sbromsw_entry_err; } ret = sbromsw_toc1_traverse(); if(ret) { printf("sbromsw_entry sbromsw_toc1_traverse failed\n"); goto __sbromsw_entry_err; } __sbromsw_entry_err: #ifdef CONFIG_BOOT_A15 if(!(toc0_config->boot_cpu & 0xff00)) { sbromsw_clear_env(); boot0_jump(SUNXI_FEL_ADDR_IN_SECURE); } else { rtc_region_set_flag(SUNXI_RUN_EFEX_FLAG); sbromsw_clear_env(); watchdog_enable(); } #endif __sbromsw_entry_err0: sbromsw_clear_env(); boot0_jump(SUNXI_FEL_ADDR_IN_SECURE); }
/******************************************************************************* *函数名称: Boot0_C_part *函数原型:void Boot0_C_part( void ) *函数功能: Boot0中用C语言编写的部分的主流程 *入口参数: void *返 回 值: void *备 注: *******************************************************************************/ void main( void ) { __u32 status; __s32 dram_size; int ddr_aotu_scan = 0; int pwr_en = 0; __u32 fel_flag; __u32 boot_cpu=0; bias_calibration(); timer_init(); sunxi_serial_init( BT0_head.prvt_head.uart_port, (void *)BT0_head.prvt_head.uart_ctrl, 6 ); if( BT0_head.prvt_head.enable_jtag ) { boot_set_gpio((normal_gpio_cfg *)BT0_head.prvt_head.jtag_gpio, 6, 1); } printf("HELLO! BOOT0 is starting!\n"); print_version(); #ifdef CONFIG_ARCH_SUN7I reset_cpux(1); #endif fel_flag = rtc_region_probe_fel_flag(); if(fel_flag == SUNXI_RUN_EFEX_FLAG) { rtc_region_clear_fel_flag(); printf("eraly jump fel\n"); goto __boot0_entry_err0; } #ifdef CONFIG_BOOT_A15 // printf("BT0_head.boot_head.boot_cpu=0x%x\n", BT0_head.boot_head.boot_cpu); // if(BT0_head.boot_head.boot_cpu) // { // fel_flag = BOOT_A7_FLAG; // } // else // { // fel_flag = BOOT_A15_FLAG; // } /* boot_cpu 含义 bit0~7 bit8~15 0:不需要保存标志位 1:当前应该切换a15启动 1:通知u-boot保存 0:当前应该切换a7启动 每次从brom读取的boot_cpu只能是0x100或者0 */ boot_cpu = BT0_head.boot_head.boot_cpu; pwr_en = BT0_head.boot_head.pwr_en; if(fel_flag == BOOT_A15_FLAG) { rtc_region_clear_fel_flag(); if(boot_cpu == 0x00) //如果原本是a7启动 boot_cpu = 0x101; //a15启动,需要保存标志位 switch_to_a15(pwr_en); } else if(fel_flag == BOOT_A7_FLAG) { rtc_region_clear_fel_flag(); if(boot_cpu == 0x100) //如果原本是a15启动 boot_cpu = 0x01; //a7启动,需要保存标志位 } else { if(boot_cpu == 0x100) { switch_to_a15(pwr_en); //a15启动,不需要保存标志位 } else { boot_cpu = 0x0; //a7启动,不需要保存标志位 } } // printf("BT0_head.boot_head.boot_cpu=0x%x\n", BT0_head.boot_head.boot_cpu); #endif mmu_setup(); ddr_aotu_scan = 0; dram_size = init_DRAM(ddr_aotu_scan, (void *)BT0_head.prvt_head.dram_para); if(dram_size) { //mdfs_save_value(); printf("dram size =%d\n", dram_size); } else { printf("initializing SDRAM Fail.\n"); goto __boot0_entry_err; } #if defined(CONFIG_ARCH_SUN9IW1P1) __msdelay(100); #endif #ifdef CONFIG_ARCH_SUN7I check_super_standby_flag(); #endif status = load_boot1(); printf("Ready to disable icache.\n"); mmu_turn_off( ); // disable instruction cache if( status == 0 ) { //跳转之前,把所有的dram参数写到boot1中 set_dram_para((void *)&BT0_head.prvt_head.dram_para, dram_size, boot_cpu); printf("Jump to secend Boot.\n"); boot0_jump(CONFIG_SYS_TEXT_BASE); // 如果载入Boot1成功,跳转到Boot1处执行 } __boot0_entry_err: #ifdef CONFIG_BOOT_A15 if(!(boot_cpu & 0xff00)) { boot0_clear_env(); boot0_jump(FEL_BASE); } else { rtc_region_set_flag(SUNXI_RUN_EFEX_FLAG); boot0_clear_env(); watchdog_enable(); } #endif __boot0_entry_err0: boot0_clear_env(); boot0_jump(FEL_BASE); }