Example #1
0
void odyssey2_state::machine_reset()
{
	m_lum = 0;

	/* jump to "last" bank, will work for all sizes due to being mirrored */
	m_p1 = 0xFF;
	m_p2 = 0xFF;
	switch_banks();
}
Example #2
0
int MMC1::write(Memory *mem, int addr, uint8 value){
	if ((value&0x80)==0x80){ 
	// If bit 7 is set clear shift register
		clear();
		return 0;
	}
	shift_reg >>= 1;
	uint8 aux = (value&0x01) << 7;
	shift_reg |= aux;

	// Check if shift register is full (SR only has 5 bits. So only the 5 most significant bits of byte mathers.) xxxxx___
	if((shift_reg&0x04)==0x04){
		if(addr >= 0xA000){
			switch_banks(mem, addr);
		}
		else{
			//write_control(addr);
			controlReg = shift_reg;
		}
		
		clear();
	}	
}