Example #1
0
/**
 * \brief Test Synchronous clock
 *
 * This test enables source clock for main clock, sets CPU/HSB,
 * PBA,PBB,PBC(if have), PBD(if have) division factor, and then check
 * if the chip is set correctly.
 *
 * \note It's not easy to measure CPU/HSB,PBA... frequency, even through
 * some chips have freqm module. Using external module may cause some
 * reliability issue. Since synchronous clocks share the common root
 * main clock, they only need set division factor. So we just test
 * the related registers if set correctly after calling common clock
 * service.
 *
 * \param test Current test case.
 */
static void run_sync_clock_test(const struct test_case *test)
{
    bool status;
    /* avoid Cppcheck Warning */
    UNUSED(status);

    sysclk_init();
    //PBA clock set, usart can be used
    usart_ready = 1;

#ifdef CONFIG_CPU_HZ
    status = (CONFIG_CPU_HZ == sysclk_get_cpu_hz());
    test_assert_true(test, status, "CPU clock set fail");
#endif

#ifdef CONFIG_PBA_HZ
    status = (CONFIG_PBA_HZ == sysclk_get_pba_hz());
    test_assert_true(test, status, "PBA clock set fail");
#endif

#ifdef CONFIG_PBB_HZ
    status = (CONFIG_PBB_HZ == sysclk_get_pbb_hz());
    test_assert_true(test, status, "PBB clock set fail");
#endif

#ifdef CONFIG_PBC_HZ
    status = (CONFIG_PBC_HZ == sysclk_get_pbc_hz());
    test_assert_true(test, status, "PBC clock set fail");
#endif

#ifdef CONFIG_PBD_HZ
    status = (CONFIG_PBD_HZ == sysclk_get_pbd_hz());
    test_assert_true(test, status, "PBD clock set fail");
#endif
}
Example #2
0
File: sysclk.c Project: marekr/asf
/**
 * \brief Retrieves the current rate in Hz of the Peripheral Bus clock attached
 *        to the specified peripheral.
 *
 * \param module Pointer to the module's base address.
 *
 * \return Frequency of the bus attached to the specified peripheral, in Hz.
 */
uint32_t sysclk_get_peripheral_bus_hz(const volatile void *module)
{
	/* Fallthroughs intended for modules sharing the same peripheral bus. */
	switch ((uintptr_t)module) {
	case IISC_ADDR:
	case SPI_ADDR:
	case TC0_ADDR:
	case TC1_ADDR:
	case TWIM0_ADDR:
	case TWIS0_ADDR:
	case TWIM1_ADDR:
	case TWIS1_ADDR:
	case USART0_ADDR:
	case USART1_ADDR:
	case USART2_ADDR:
	case USART3_ADDR:
	case ADCIFE_ADDR:
	case DACC_ADDR:
	case ACIFC_ADDR:
	case GLOC_ADDR:
	case ABDACB_ADDR:
	case TRNG_ADDR:
	case PARC_ADDR:
	case CATB_ADDR:
	case TWIM2_ADDR:
	case TWIM3_ADDR:
	#if !SAM4LS
	case LCDCA_ADDR:
	#endif
		return sysclk_get_pba_hz();

	case HFLASHC_ADDR:
	case HCACHE_ADDR:
	case HMATRIX_ADDR:
	case PDCA_ADDR:
	case CRCCU_ADDR:
	case USBC_ADDR:
	case PEVC_ADDR:
		return sysclk_get_pbb_hz();

	case PM_ADDR:
	case CHIPID_ADDR:
	case SCIF_ADDR:
	case FREQM_ADDR:
	case GPIO_ADDR:
		return sysclk_get_pbc_hz();

	case BPM_ADDR:
	case BSCIF_ADDR:
	case AST_ADDR:
	case WDT_ADDR:
	case EIC_ADDR:
	case PICOUART_ADDR:
		return sysclk_get_pbd_hz();

	default:
		Assert(false);
		return 0;
	}
}