void
dec_2100_a500_init(cputype)
{
/*
* See if we're a `Sable' or a `Lynx'.
*/
if (cputype == ST_DEC_2100_A500) {
if (alpha_implver() == ALPHA_IMPLVER_EV5)
sable_lynx_base = LYNX_BASE;
else
sable_lynx_base = SABLE_BASE;
platform.family = "DEC AlphaServer 2100";
} else if (cputype == ST_DEC_2100A_A500) {
sable_lynx_base = LYNX_BASE;
platform.family = "DEC AlphaServer 2100A";
} else {
sable_lynx_base = SABLE_BASE;
platform.family = "DEC AlphaServer 2100?????";
}
if ((platform.model = alpha_dsr_sysname()) == NULL) {
platform.model = alpha_unknown_sysname();
}
platform.iobus = "t2";
platform.cons_init = dec_2100_a500_cons_init;
platform.pci_intr_init = dec_2100_a500_intr_init;
t2_init();
}
void hal_nrf_init(void)
{
hal_nrf_sta=HAL_NRF_STA_RX;
hal_nrf_tx_sta = HAL_NRF_TX_STA_IDLE;
hal_nrf_tx_rd_index=0, hal_nrf_tx_cnt=0, hal_nrf_tx_wr_index=0;
hal_nrf_tx_busy = 0;
hal_nrf_rx_sta = HAL_NRF_RX_STA_IDLE;
hal_nrf_rx_rd_index=0, hal_nrf_rx_cnt=0, hal_nrf_rx_wr_index=0;
CSN_OUTPUT();
CE_OUTPUT();
CSN_HIGH();
CE_LOW();
IRQ_INPUT() ;
IRQ_EN();
t2_init();
spi_init();
hal_nrf_tick_num = sys_tick_apply();
sys_tick_set(hal_nrf_tick_num, ON);
hal_nrf_cnt = 0;
}
static void
dec_2100_a500_cons_init()
{
struct ctb *ctb;
t2_init();
#ifdef DDB
siogdbattach(0x2f8, 9600);
#endif
ctb = (struct ctb *)(((caddr_t)hwrpb) + hwrpb->rpb_ctb_off);
switch (ctb->ctb_term_type) {
case 2:
/* serial console ... */
/* XXX */
/*
* Delay to allow PROM putchars to complete.
* FIFO depth * character time,
* character time = (1000000 / (defaultrate / 10))
*/
DELAY(160000000 / comcnrate);
/*
* force a comconsole on com1 if the SRM has a serial console
*/
comconsole = 0;
if (siocnattach(0x3f8, comcnrate))
panic("can't init serial console");
boothowto |= RB_SERIAL;
break;
case 3:
/* display console ... */
/* XXX */
#ifdef DEV_SC
sccnattach();
#else
panic("not configured to use display && keyboard console");
#endif
break;
default:
printf("ctb->ctb_term_type = 0x%lx\n", ctb->ctb_term_type);
panic("consinit: unknown console type");
}
}
static void prvSetupTimerInterrupt( void )
{
const uint16_t usTimerACompare = portTIMER_COMPARE, usTimerAMode = portENABLE_TIMER_AND_INTERRUPT;
const uint16_t usT2_IRQ = 0x13;
/* Configure the timer, the dummy handler is used here as the init
function leaves interrupts enabled. */
t2_init( usTimerAMode, usTimerACompare, prvDummyISR );
/* Disable interrupts again before installing the real handlers. */
portDISABLE_INTERRUPTS();
#if( configUSE_PREEMPTION == 1 )
/* Tick service routine used by the scheduler when preemptive scheduling is
being used. */
setvect( usT2_IRQ, prvPreemptiveTick );
#else
/* Tick service routine used by the scheduler when cooperative scheduling is
being used. */
setvect( usT2_IRQ, prvNonPreemptiveTick );
#endif
}
//===============================================
//===============================================
//===============================================
//===============================================
main()
{
CLK->CKDIVR=0;
rele_cnt_index=0;
GPIOD->DDR&=~(1<<6);
GPIOD->CR1|=(1<<6);
GPIOD->CR2|=(1<<6);
//GPIOD->ODR&=~(1<<6);
GPIOD->DDR|=(1<<5);
GPIOD->CR1|=(1<<5);
GPIOD->CR2|=(1<<5);
GPIOD->ODR|=(1<<5);
delay_ms(10);
if(!(GPIOD->IDR&=(1<<6)))
{
rele_cnt_index=1;
}
else
{
GPIOD->ODR&=~(1<<5);
delay_ms(10);
if(!(GPIOD->IDR&=(1<<6)))
{
rele_cnt_index=2;
}
}
gpio_init();
//delay_ms(100);
//delay_ms(100);
//delay_ms(100);
//delay_ms(100);
//delay_ms(100);
spi_init();
t4_init();
FLASH_DUKR=0xae;
FLASH_DUKR=0x56;
//GPIOD->DDR|=(1<<5);
//GPIOD->CR1=0xff;
//GPIOD->CR2=0;
dumm[1]++;
uart_init();
ST_RDID_read();
if(mdr0==0x20) memory_manufacturer='S';
else
{
DF_mf_dev_read();
if(mdr0==0x1F) memory_manufacturer='A';
}
t2_init();
ST_WREN();
enableInterrupts();
while (1)
{
if(bBUFF_LOAD)
{
bBUFF_LOAD=0;
//GPIOD->ODR^=(1<<4);
if(current_page<last_page)
{
current_page++;
}
else
{
current_page=0;
play=0;
}
if(memory_manufacturer=='A')
{
DF_page_to_buffer(/*///current_buffer_H*//*1,*/current_page);
}
}
if(bBUFF_READ_L)
{
bBUFF_READ_L=0;
if(memory_manufacturer=='A')
{
DF_buffer_read(/*///current_buffer_L*//*1,*/0,128,buff);
}
if(memory_manufacturer=='S')
{
ST_READ((unsigned long)((unsigned long)(current_page*256UL)),128,buff);
}
}
if(bBUFF_READ_H)
{
bBUFF_READ_H=0;
if(memory_manufacturer=='A')
{
DF_buffer_read(/*///current_buffer_L*//*1,*/128,128,&buff[128]);
}
if(memory_manufacturer=='S')
{
ST_READ((unsigned long)((unsigned long)(current_page*256UL)+128UL),128,&buff[128]);
}
}
if(bRXIN)
{
bRXIN=0;
uart_in();
}
if(b100Hz)
{
b100Hz=0;
if(but_block_cnt)but_block_cnt--;
if(bSTART==1)
{
if(play)
{
#ifdef LAMPA_MAGNITOFON
if(!but_block_cnt)
{
play=0;
bSTART=0;
but_block_cnt=50;
}
#endif
bSTART=0;
}
else
#ifdef LAMPA_MAGNITOFON
if(!but_block_cnt)
#endif
{
current_page=1;
#ifdef LAMPA_MAGNITOFON
last_page=6000;
#ifdef LAMPA15
last_page=933;
#endif
#endif
if(memory_manufacturer=='A')
{
DF_page_to_buffer(/*///current_buffer_H*//*1,*/current_page);
delay_ms(10);
DF_buffer_read(/*///current_buffer_L*//*1,*/0,128,buff);
delay_ms(10);
DF_buffer_read(/*///current_buffer_L*//*1,*/128,128,&buff[128]);
}
if(memory_manufacturer=='S')
{
ST_READ(0,256,buff);
}
play=1;
bSTART=0;
rele_cnt=rele_cnt_const[rele_cnt_index];
#ifdef LAMPA_MAGNITOFON
but_block_cnt=50;
#endif
}
}
}
if(b10Hz)
{
b10Hz=0;
rele_drv();
pwm_fade_in++;
if(pwm_fade_in>128)pwm_fade_in=128;
if(current_page_cnt)
{
current_page_cnt--;
if(!current_page_cnt)
{
uart_out (5,CMND,21,current_page%256,current_page/256,1,0);
current_page_cnt=10;
current_page_cnt_=4;
current_byte_in_buffer=0;
}
}
}
if(b5Hz)
{
b5Hz=0;
//GPIOD->ODR^=(1<<4);
//GPIOD->ODR^=(1<<4);
}
if(b1Hz)
{
long temp_L;
b1Hz=0;
//GPIOD->ODR^=(1<<4);
//temp_L=DF_mf_dev_read();
//buff[0]++;
//uart_out (6,0x11,*((char*)&temp_L),*(((char*)&temp_L)+1),*(((char*)&temp_L)+2),*(((char*)&temp_L)+3),DF_status_read());
//uart_out_adr (&t0_cnt0, 65);
//aaa++;
if((!bERASE_IN_PROGRESS)&&(bSTART_DOWNLOAD))
{
bSTART_DOWNLOAD=0;
uart_out (4,CMND,21,current_page%256,current_page/256,0,0);
current_page_cnt=10;
current_page_cnt_=4;
current_byte_in_buffer=0;
}
if(bERASE_IN_PROGRESS)
{
char temp;
temp=ST_status_read();
if((temp&0x01)==0)
{
bERASE_IN_PROGRESS=0;
//uart_out (3,CMND,33,0,0,0,0);
//uart_out (3,CMND,2,temp,0,0,0);
uart_out (3,CMND,33,33,0,0,0);
}
//uart_out (3,CMND,2,temp,0,0,0);
}
//if(bERASE_IN_PROGRESS)uart_out (3,CMND,2,66,0,0,0);
//else uart_out (3,CMND,2,55,0,0,0);
}
}
}
void app_init()
{
t2_init();
}