C++ (Cpp) tegra30_dam_set_filter_stages Examples

Example #1

File: tegra30_dam.c Project: Toradex-Apalis-TK1-AndroidTV/android_kernel_nvidia_mm

static int tegra30_dam_set_step_reset(struct tegra30_dam_context *dam,
		int insample, int outsample)
{
#ifdef CONFIG_ARCH_TEGRA_3x_SOC
	int step_reset = 0;
	int i = 0;

	for (i = 0; i < ARRAY_SIZE(step_table); i++) {
		if ((insample == step_table[i].insample) &&
			(outsample == step_table[i].outsample))
			step_reset = step_table[i].stepreset;
	}

	tegra30_dam_ch0_set_step(dam, step_reset);
#else
	tegra30_dam_write_coeff_ram(dam, insample, outsample);
	tegra30_dam_set_farrow_param(dam, insample, outsample);
	tegra30_dam_set_biquad_fixed_coef(dam);
	tegra30_dam_enable_coeff_ram(dam);
	tegra30_dam_set_filter_stages(dam, insample, outsample);
#endif

	return 0;
}

Example #2

File: tegra_aic326x.c Project: coreentin/android_kernel_nvidia_s8515

static int tegra_aic326x_startup(struct snd_pcm_substream *substream)
{
	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(cpu_dai);
	struct tegra_aic326x *machine = snd_soc_card_get_drvdata(rtd->card);
	struct codec_config *codec_info;
	struct codec_config *bb_info;
	struct codec_config *hifi_info;
	int codec_index;

	if (!i2s->is_dam_used)
		return 0;

	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		/*
		*make apbif tx to i2s rx connection if this is the only client
		*using i2s for playback
		*/
		if (i2s->playback_ref_count == 1) {
			tegra30_ahub_set_rx_cif_source(
				TEGRA30_AHUB_RXCIF_I2S0_RX0 + i2s->id,
				i2s->txcif);
			tegra30_ahub_enable_clocks();
		}

	} else {
		i2s->is_call_mode_rec = machine->is_call_mode;
		if (!i2s->is_call_mode_rec)
			return 0;

		if (machine->is_device_bt)
			codec_index = BT_SCO;
		else
			codec_index = VOICE_CODEC;

		codec_info = &machine->codec_info[codec_index];
		bb_info = &machine->codec_info[BASEBAND];
		hifi_info = &machine->codec_info[HIFI_CODEC];

		/* allocate a dams for voice call recording */

		i2s->call_record_dam_ifc = tegra30_dam_allocate_controller();

		if (i2s->call_record_dam_ifc < 0)
			return i2s->call_record_dam_ifc;

		tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
			TEGRA30_DAM_CHIN0_SRC);
		tegra30_dam_allocate_channel(i2s->call_record_dam_ifc,
			TEGRA30_DAM_CHIN1);
		tegra30_dam_enable_clock(i2s->call_record_dam_ifc);

		i2s->call_record_dam_ifc2 = tegra30_dam_allocate_controller();

		if (i2s->call_record_dam_ifc2 < 0)
			return i2s->call_record_dam_ifc2;

		tegra30_dam_allocate_channel(i2s->call_record_dam_ifc2,
			TEGRA30_DAM_CHIN0_SRC);
		tegra30_dam_allocate_channel(i2s->call_record_dam_ifc2,
			TEGRA30_DAM_CHIN1);
		tegra30_dam_enable_clock(i2s->call_record_dam_ifc2);

		/* configure the dams */
		/* DAM0 SRC bb rate to hifi rate */
		tegra_aic326x_set_dam_cif(i2s->call_record_dam_ifc,
			codec_info->rate, codec_info->channels,
			codec_info->bitsize, 1, hifi_info->rate,
			hifi_info->channels, hifi_info->bitsize);
		/* DAM1 UL + DL Mix */
		tegra_aic326x_set_dam_cif(i2s->call_record_dam_ifc2,
			codec_info->rate, codec_info->channels,
			codec_info->bitsize, 1, bb_info->rate,
			bb_info->channels, bb_info->bitsize);

		/* setup the connections for voice call record */
		tegra30_ahub_unset_rx_cif_source(i2s->rxcif);
		tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
			(i2s->call_record_dam_ifc2*2),
			TEGRA30_AHUB_TXCIF_I2S0_TX0 + bb_info->i2s_id);
		tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX1 +
			(i2s->call_record_dam_ifc2*2),
			TEGRA30_AHUB_TXCIF_I2S0_TX0 + codec_info->i2s_id);
		tegra30_ahub_set_rx_cif_source(TEGRA30_AHUB_RXCIF_DAM0_RX0 +
			(i2s->call_record_dam_ifc*2),
			TEGRA30_AHUB_TXCIF_DAM0_TX0 +
			i2s->call_record_dam_ifc2);
		tegra30_ahub_set_rx_cif_source(i2s->rxcif,
			TEGRA30_AHUB_TXCIF_DAM0_TX0 + i2s->call_record_dam_ifc);
#ifndef CONFIG_ARCH_TEGRA_3x_SOC
		/* Configure DAM0 for SRC */
		if (bb_info->rate != hifi_info->rate) {
			tegra30_dam_write_coeff_ram(i2s->call_record_dam_ifc,
						bb_info->rate, hifi_info->rate);
			tegra30_dam_set_farrow_param(i2s->call_record_dam_ifc,
						bb_info->rate, hifi_info->rate);
			tegra30_dam_set_biquad_fixed_coef(
						i2s->call_record_dam_ifc);
			tegra30_dam_enable_coeff_ram(i2s->call_record_dam_ifc);
			tegra30_dam_set_filter_stages(i2s->call_record_dam_ifc,
							bb_info->rate,
							hifi_info->rate);
		}
#endif
		/* enable the dam */
		tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE,
				TEGRA30_DAM_CHIN1);
		tegra30_dam_enable(i2s->call_record_dam_ifc, TEGRA30_DAM_ENABLE,
				TEGRA30_DAM_CHIN0_SRC);
		tegra30_dam_enable(i2s->call_record_dam_ifc2,
					TEGRA30_DAM_ENABLE,
					TEGRA30_DAM_CHIN1);
		tegra30_dam_enable(i2s->call_record_dam_ifc2,
					TEGRA30_DAM_ENABLE,
					TEGRA30_DAM_CHIN0_SRC);
	}

	return 0;
}