/*---------------------------------------------------------------------------*/ void cc26xx_uart_set_input(int (*input)(unsigned char c)) { input_handler = input; /* Return early if disabled by user conf or if ports are misconfigured */ if(usable() == false) { return; } if(input == NULL) { /* Let the SERIAL PD power down */ uart_module.domain_lock = LPM_DOMAIN_NONE; /* Disable module clocks under sleep and deep sleep */ ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_UART0); ti_lib_prcm_peripheral_deep_sleep_disable(PRCM_PERIPH_UART0); } else { /* Request the SERIAL PD to stay on during deep sleep */ uart_module.domain_lock = LPM_DOMAIN_SERIAL; /* Enable module clocks under sleep and deep sleep */ ti_lib_prcm_peripheral_sleep_enable(PRCM_PERIPH_UART0); ti_lib_prcm_peripheral_deep_sleep_enable(PRCM_PERIPH_UART0); } ti_lib_prcm_load_set(); while(!ti_lib_prcm_load_get()); enable(); return; }
/*---------------------------------------------------------------------------*/ static void lpm_drop_handler(uint8_t mode) { /* * First, wait for any outstanding TX to complete. If we have an input * handler, the SERIAL PD will be kept on and the UART module clock will * be enabled under sleep as well as deep sleep. In theory, this means that * we shouldn't lose any outgoing bytes, but we actually do on occasion. * This byte loss may (or may not) be related to the freezing of IO latches * between MCU and AON when we drop to deep sleep. This here is essentially a * workaround */ if(accessible() == true) { while(ti_lib_uart_busy(UART0_BASE)); } /* * If we have a registered input_handler then we need to retain RX * capability. Thus, if this is not a shutdown notification and we have an * input handler, we do nothing */ if((mode != LPM_MODE_SHUTDOWN) && (input_handler != NULL)) { return; } /* * If we reach here, we either don't care about staying awake or we have * received a shutdown notification * * Only touch UART registers if the module is powered and clocked */ if(accessible() == true) { /* Disable the module */ ti_lib_uart_disable(UART0_BASE); /* Disable all UART interrupts and clear all flags */ disable_interrupts(); } /* * Always stop the clock in run mode. Also stop in Sleep and Deep Sleep if * this is a request for full shutdown */ ti_lib_prcm_peripheral_run_disable(PRCM_PERIPH_UART0); if(mode == LPM_MODE_SHUTDOWN) { ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_UART0); ti_lib_prcm_peripheral_deep_sleep_disable(PRCM_PERIPH_UART0); } ti_lib_prcm_load_set(); while(!ti_lib_prcm_load_get()); /* Set pins to low leakage configuration in preparation for deep sleep */ lpm_pin_set_default_state(BOARD_IOID_UART_TX); lpm_pin_set_default_state(BOARD_IOID_UART_RX); lpm_pin_set_default_state(BOARD_IOID_UART_CTS); lpm_pin_set_default_state(BOARD_IOID_UART_RTS); }
/*---------------------------------------------------------------------------*/ void buzzer_stop() { buzzer_on = 0; lpm_pd_lock_release(&lock); /* Stop the timer */ ti_lib_timer_disable(GPT0_BASE, TIMER_A); /* * Stop running in sleep mode. * ToDo: Currently GPT0 is in use by clock_delay_usec (GPT0/TB) and by this * module here (GPT0/TA). clock_delay_usec will never need GPT0/TB in sleep * mode and we control TA here. Thus, with the current setup, it's OK to * control whether GPT0 runs in sleep mode in this module here. However, if * some other module at some point starts using GPT0, we should change this * to happen through an umbrella module */ ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_TIMER0); ti_lib_prcm_peripheral_deep_sleep_disable(PRCM_PERIPH_TIMER0); ti_lib_prcm_load_set(); while(!ti_lib_prcm_load_get()); }