Example #1
0
static int
ti_gpio_bank_init(device_t dev, int bank)
{
	int pin;
	struct ti_gpio_softc *sc;
	uint32_t flags, reg_oe;

	sc = device_get_softc(dev);

	/* Enable the interface and functional clocks for the module. */
	ti_prcm_clk_enable(GPIO0_CLK + FIRST_GPIO_BANK + bank);

	/*
	 * Read the revision number of the module.  TI don't publish the
	 * actual revision numbers, so instead the values have been
	 * determined by experimentation.
	 */
	sc->sc_revision[bank] = ti_gpio_read_4(sc, bank, TI_GPIO_REVISION);

	/* Check the revision. */
	if (sc->sc_revision[bank] != TI_GPIO_REV) {
		device_printf(dev, "Warning: could not determine the revision "
		    "of %u GPIO module (revision:0x%08x)\n",
		    bank, sc->sc_revision[bank]);
		return (EINVAL);
	}

	/* Disable interrupts for all pins. */
	ti_gpio_intr_clr(sc, bank, 0xffffffff);

	/* Init OE register based on pads configuration. */
	reg_oe = 0xffffffff;
	for (pin = 0; pin < PINS_PER_BANK; pin++) {
		ti_scm_padconf_get_gpioflags(PINS_PER_BANK * bank + pin,
		    &flags);
		if (flags & GPIO_PIN_OUTPUT)
			reg_oe &= ~(1UL << pin);
	}
	ti_gpio_write_4(sc, bank, TI_GPIO_OE, reg_oe);

	return (0);
}
Example #2
0
/**
 *	ti_gpio_pin_getflags - Gets the current flags of a given pin
 *	@dev: gpio device handle
 *	@pin: the number of the pin
 *	@flags: upon return will contain the current flags of the pin
 *
 *	Reads the current flags of a given pin, here we actually read the H/W
 *	registers to determine the flags, rather than storing the value in the
 *	setflags call.
 *
 *	LOCKING:
 *	Internally locks the context
 *
 *	RETURNS:
 *	Returns 0 on success otherwise an error code
 */
static int
ti_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
{
	struct ti_gpio_softc *sc = device_get_softc(dev);
	uint32_t bank = (pin / PINS_PER_BANK);

	TI_GPIO_LOCK(sc);

	/* Sanity check the pin number is valid */
	if ((bank >= MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) {
		TI_GPIO_UNLOCK(sc);
		return (EINVAL);
	}

	/* Get the current pin state */
	ti_scm_padconf_get_gpioflags(pin, flags);

	TI_GPIO_UNLOCK(sc);

	return (0);
}
Example #3
0
/**
 *	ti_gpio_attach - attach function for the driver
 *	@dev: gpio device handle
 *
 *	Allocates and sets up the driver context for all GPIO banks.  This function
 *	expects the memory ranges and IRQs to already be allocated to the driver.
 *
 *	LOCKING:
 *	None
 *
 *	RETURNS:
 *	Always returns 0
 */
static int
ti_gpio_attach(device_t dev)
{
	struct ti_gpio_softc *sc = device_get_softc(dev);
	unsigned int i;
	int err = 0;
	int pin;
	uint32_t flags;
	uint32_t reg_oe;

	sc->sc_dev = dev;

	TI_GPIO_LOCK_INIT(sc);

	/* There are up to 6 different GPIO register sets located in different
	 * memory areas on the chip.  The memory range should have been set for
	 * the driver when it was added as a child.
	 */
	err = bus_alloc_resources(dev, ti_gpio_mem_spec, sc->sc_mem_res);
	if (err) {
		device_printf(dev, "Error: could not allocate mem resources\n");
		return (ENXIO);
	}

	/* Request the IRQ resources */
	err = bus_alloc_resources(dev, ti_gpio_irq_spec, sc->sc_irq_res);
	if (err) {
		device_printf(dev, "Error: could not allocate irq resources\n");
		return (ENXIO);
	}

	/* Setup the IRQ resources */
	for (i = 0; i < MAX_GPIO_BANKS; i++) {
		if (sc->sc_irq_res[i] == NULL)
			break;

		/* Register an interrupt handler for each of the IRQ resources */
		if ((bus_setup_intr(dev, sc->sc_irq_res[i], INTR_TYPE_MISC | INTR_MPSAFE, 
		                    NULL, ti_gpio_intr, sc, &(sc->sc_irq_hdl[i])))) {
			device_printf(dev, "WARNING: unable to register interrupt handler\n");
			return (ENXIO);
		}
	}

	/* We need to go through each block and ensure the clocks are running and
	 * the module is enabled.  It might be better to do this only when the
	 * pins are configured which would result in less power used if the GPIO
	 * pins weren't used ... 
	 */
	for (i = 0; i < MAX_GPIO_BANKS; i++) {
		if (sc->sc_mem_res[i] != NULL) {

			/* Enable the interface and functional clocks for the module */
			ti_prcm_clk_enable(GPIO0_CLK + FIRST_GPIO_BANK + i);

			/* Read the revision number of the module. TI don't publish the
			 * actual revision numbers, so instead the values have been
			 * determined by experimentation.
			 */
			sc->sc_revision[i] = ti_gpio_read_4(sc, i, TI_GPIO_REVISION);

			/* Check the revision */
			if (sc->sc_revision[i] != TI_GPIO_REV) {
				device_printf(dev, "Warning: could not determine the revision"
				              "of %u GPIO module (revision:0x%08x)\n",
				              i, sc->sc_revision[i]);
				continue;
			}

			/* Disable interrupts for all pins */
			ti_gpio_write_4(sc, i, TI_GPIO_CLEARIRQENABLE1, 0xffffffff);
			ti_gpio_write_4(sc, i, TI_GPIO_CLEARIRQENABLE2, 0xffffffff);

			/* Init OE register based on pads configuration */
			reg_oe = 0xffffffff;
			for (pin = 0; pin < 32; pin++) {
				ti_scm_padconf_get_gpioflags(
				    PINS_PER_BANK*i + pin, &flags);
				if (flags & GPIO_PIN_OUTPUT)
					reg_oe &= ~(1U << pin);
			}

			ti_gpio_write_4(sc, i, TI_GPIO_OE, reg_oe);
		}
	}

	/* Finish of the probe call */
	device_add_child(dev, "gpioc", device_get_unit(dev));
	device_add_child(dev, "gpiobus", device_get_unit(dev));

	return (bus_generic_attach(dev));
}