//DAC control interrupt void tim2_isr(void){ if(timer_interrupt_source(TIM3, TIM_SR_CC1IF)){ gpio_set(GPIOA, GPIO12); //set the pin high. Must do this first for timing timer_clear_flag(TIM2, TIM_SR_CC1IF); //detect end of packet transmission /* if(end of packet){ currently_transmitting = false; if(buffers_full){ buffers_full=false; enable spi1 interrupts set 'full' pin low } timer_disable_counter(TIM2); timer_set_counter(TIM2, 0); gpio_clear(GPIOA, GPIO12); //set DAC-CLK low } */ } if(timer_interrupt_source(TIM3, TIM_SR_UIF)){ gpio_port_write(GPIOC, (next_transmit[1] | (next_transmit[0]<<8))); //set the dac-db pins gpio_clear(GPIOA, GPIO12); //set DAC-CLK low timer_clear_flag(TIM2, TIM_SR_UIF); //reset the interrupt flag generate_sample(); } return; }
void tim2_isr(void) { count++; if (timer_interrupt_source(TIM2, TIM_SR_UIF)) timer_clear_flag(TIM2, TIM_SR_UIF); /* Clear interrrupt flag. */ timer_get_flag(TIM2, TIM_SR_UIF); /* Reread to force the previous (buffered) write before leaving */ pxMBPortCBTimerExpired(); }
void tim2_isr(void){ if(timer_interrupt_source(TIM2, TIM_SR_CC1IF)){ gpio_set(GPIOA, GPIO14); timer_clear_flag(TIM2, TIM_SR_CC1IF); //now to generate the next sample generate_sample(); i++; if(i==n) i=0; } if(timer_interrupt_source(TIM2, TIM_SR_UIF)){ gpio_clear(GPIOA, GPIO14); //set DAC-CLK low gpio_port_write(GPIOC, (next_transmit[1] | (next_transmit[0]<<8))); //set the dac-db pins timer_clear_flag(TIM2, TIM_SR_UIF); } return; }
void tim3_isr(void) { if (timer_interrupt_source(TIM3,TIM_SR_UIF)) { timer_clear_flag(TIM3,TIM_SR_UIF); timer_set_oc_value(TIM3, TIM_OC1, PULSE); timer_disable_oc_output(TIM3,TIM_OC2); timer_disable_oc_output(TIM3,TIM_OC4); //timer_disable_irq(TIM3,TIM_OC2); //timer_disable_irq(TIM3,TIM_OC4); timer_enable_irq(TIM3,TIM_DIER_CC1IE); //gpio_set(GPIOA,GPIO1); } if ( timer_interrupt_source(TIM3,TIM_SR_CC1IF)) { timer_clear_flag(TIM3,TIM_SR_CC1IF); //if (PERIOD >= TIM3_CCR1) { //gpio_clear(GPIOA,GPIO1); timer_enable_oc_output(TIM3, TIM_OC2); //timer_enable_irq(TIM3,TIM_DIER_CC2IE); // } } if(timer_interrupt_source(TIM3,TIM_SR_CC2IF)) { timer_clear_flag(TIM3,TIM_SR_CC2IF); timer_set_oc_value(TIM3, TIM_OC1, PULSE*4); //timer_enable_oc_output(TIM3,TIM_OC1); timer_disable_oc_output(TIM3,TIM_OC2); //timer_disable_irq(TIM3,TIM_DIER_CC2IE); } if(timer_interrupt_source(TIM3,TIM_SR_CC3IF)) { timer_clear_flag(TIM3,TIM_SR_CC3IF); timer_enable_oc_output(TIM3,TIM_OC4); //timer_enable_irq(TIM3,TIM_DIER_CC4IE); } if(timer_interrupt_source(TIM3,TIM_SR_CC4IF)) { //timer_disable_oc_output(TIM3,TIM_OC4); } }