void tm4c_ledinit(void)
{
/* Configure LED PIOs for output */
tiva_configgpio(GPIO_LED_D1);
tiva_configgpio(GPIO_LED_D2);
tiva_configgpio(GPIO_LED_D3);
tiva_configgpio(GPIO_LED_D4);
}
void tm4c_ledinit(void)
{
/* Configure LED PIOs for output */
tiva_configgpio(GPIO_LED_R);
tiva_configgpio(GPIO_LED_G);
tiva_configgpio(GPIO_LED_B);
}
void board_userled_initialize(void)
{
/* Configure LED PIOs for output */
tiva_configgpio(GPIO_LED_D1);
tiva_configgpio(GPIO_LED_D2);
tiva_configgpio(GPIO_LED_D3);
tiva_configgpio(GPIO_LED_D4);
}
void weak_function lm_ssiinitialize(void)
{
/* Configure the SPI-based microSD CS GPIO */
ssi_dumpgpio("lm_ssiinitialize() Entry)");
tiva_configgpio(SDCCS_GPIO);
#ifdef CONFIG_NX_LCDDRIVER
tiva_configgpio(OLEDCS_GPIO);
#endif
ssi_dumpgpio("lm_ssiinitialize() Exit");
}
void tm4c_ledinit(void)
{
leddbg("Initializing\n");
/* Configure Port E, Bit 1 as an output, initial value=OFF */
led_dumpgpio("tm4c_ledinit before tiva_configgpio()");
tiva_configgpio(GPIO_LED_R);
tiva_configgpio(GPIO_LED_G);
tiva_configgpio(GPIO_LED_B);
led_dumpgpio("tm4c_ledinit after tiva_configgpio()");
}
void weak_function lm_ssiinitialize(void)
{
/* Configure the SPI CS GPIO */
ssi_dumpgpio("lm_ssiinitialize() Entry)");
tiva_configgpio(SSICS_GPIO);
ssi_dumpgpio("lm_ssiinitialize() Exit");
}
void weak_function lm_ssidev_initialize(void)
{
/* Configure the SPI-based microSD CS GPIO */
ssi_dumpgpio("lm_ssidev_initialize() before tiva_configgpio()");
tiva_configgpio(SDCCS_GPIO);
ssi_dumpgpio("lm_ssidev_initialize() after tiva_configgpio()");
}
FAR struct lcd_dev_s *board_graphics_setup(unsigned int devno)
{
FAR struct spi_dev_s *spi;
FAR struct lcd_dev_s *dev;
/* Configure the OLED GPIOs */
oledcs_dumpgpio("board_graphics_setup: After OLEDCS setup");
oleddc_dumpgpio("board_graphics_setup: On entry");
tiva_configgpio(OLEDDC_GPIO); /* PC7: OLED display data/control select (D/Cn) */
tiva_configgpio(OLEDEN_GPIO); /* PC6: Enable +15V needed by OLED (EN+15V) */
oleddc_dumpgpio("board_graphics_setup: After OLEDDC/EN setup");
/* Get the SSI port (configure as a Freescale SPI port) */
spi = up_spiinitialize(0);
if (!spi)
{
glldbg("Failed to initialize SSI port 0\n");
}
else
{
/* Bind the SSI port to the OLED */
dev = rit_initialize(spi, devno);
if (!dev)
{
glldbg("Failed to bind SSI port 0 to OLED %d: %d\n", devno);
}
else
{
gllvdbg("Bound SSI port 0 to OLED %d\n", devno);
/* And turn the OLED on (CONFIG_LCD_MAXPOWER should be 1) */
(void)dev->setpower(dev, CONFIG_LCD_MAXPOWER);
return dev;
}
}
return NULL;
}
void board_autoled_initialize(void)
{
leddbg("Initializing\n");
/* Configure Port D, Bit 0 as an output, initial value=OFF */
led_dumpgpio("board_autoled_initialize before tiva_configgpio()");
tiva_configgpio(LED_GPIO);
led_dumpgpio("board_autoled_initialize after tiva_configgpio()");
g_nest = 0;
}
void board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. */
for (i = 0; i < NUM_BUTTONS; i++)
{
tiva_configgpio(g_buttons[i]);
}
}
void tiva_adc_step_cfg(struct tiva_adc_step_cfg_s *stepcfg)
{
#ifdef CONFIG_DEBUG_ANALOG
avdbg(" shold=0x%02x flags=0x%02x ain=%d...\n",
stepcfg->shold, stepcfg->flags, stepcfg->ain);
#endif
uint8_t adc = stepcfg->adc;
uint8_t sse = stepcfg->sse;
uint8_t step = stepcfg->step;
#ifdef CONFIG_EXPERIMENTAL
uint8_t shold = stepcfg->shold;
#endif
uint8_t flags = stepcfg->flags;
uint8_t ain = stepcfg->ain;
uint32_t gpio = ain2gpio[stepcfg->ain];
avdbg("configure ADC%d SSE%d STEP%d...\n", adc, sse, step);
/* Configure the AIN GPIO for analog input if not flagged to be muxed to
* the internal temperature sensor
*/
if ((flags & TIVA_ADC_FLAG_TS) != TIVA_ADC_FLAG_TS)
{
tiva_configgpio(gpio);
}
/* Register, set sample/hold time and configure the step */
tiva_adc_sse_register_chn(adc, sse, step, ain);
tiva_adc_sse_differential(adc, sse, step, 0); /* TODO: update when differential
* support is added. */
#ifdef CONFIG_EXPERIMENTAL
tiva_adc_sse_sample_hold_time(adc, sse, step, shold);
#endif
tiva_adc_sse_step_cfg(adc, sse, step, flags);
}
void up_lowsetup(void)
{
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
uint32_t ctl;
#endif
/* Enable the selected UARTs and configure GPIO pins needed by the
* the selected UARTs. NOTE: The serial driver later depends on
* this pin configuration -- whether or not a serial console is selected.
*
* - Enable Power (TM4C129 family only): Applies power (only) to the UART
* peripheral. This is not an essential step since enabling clocking
* will also apply power. The only significance is that the UART state
* will be retained if the UART clocking is subsequently disabled.
* - Enable Clocking (All families): Applies both power and clocking to
* the UART peripheral, bringing it a fully functional state.
*/
#ifdef CONFIG_TIVA_UART0
tiva_uart0_enablepwr();
tiva_uart0_enableclk();
tiva_configgpio(GPIO_UART0_RX);
tiva_configgpio(GPIO_UART0_TX);
#endif
#ifdef CONFIG_TIVA_UART1
tiva_uart1_enablepwr();
tiva_uart1_enableclk();
tiva_configgpio(GPIO_UART1_RX);
tiva_configgpio(GPIO_UART1_TX);
#endif
#ifdef CONFIG_TIVA_UART2
tiva_uart2_enablepwr();
tiva_uart2_enableclk();
tiva_configgpio(GPIO_UART2_RX);
tiva_configgpio(GPIO_UART2_TX);
#endif
#ifdef CONFIG_TIVA_UART3
tiva_uart3_enablepwr();
tiva_uart3_enableclk();
tiva_configgpio(GPIO_UART3_RX);
tiva_configgpio(GPIO_UART3_TX);
#endif
#ifdef CONFIG_TIVA_UART4
tiva_uart4_enablepwr();
tiva_uart4_enableclk();
tiva_configgpio(GPIO_UART4_RX);
tiva_configgpio(GPIO_UART4_TX);
#endif
#ifdef CONFIG_TIVA_UART5
tiva_uart5_enablepwr();
tiva_uart5_enableclk();
tiva_configgpio(GPIO_UART5_RX);
tiva_configgpio(GPIO_UART5_TX);
#endif
#ifdef CONFIG_TIVA_UART6
tiva_uart6_enablepwr();
tiva_uart6_enableclk();
tiva_configgpio(GPIO_UART6_RX);
tiva_configgpio(GPIO_UART6_TX);
#endif
#ifdef CONFIG_TIVA_UART7
tiva_uart7_enablepwr();
tiva_uart7_enableclk();
tiva_configgpio(GPIO_UART7_RX);
tiva_configgpio(GPIO_UART7_TX);
#endif
/* Enable the selected console device */
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#ifdef TIVA_SYSCON_PRUART
/* Wait for the console UART to be ready before writing to the UART
* registers.
*/
while (!tiva_periphrdy(TIVA_SYSCON_PRUART,
SYSCON_PRUART(TIVA_CONSOLE_UART)));
#endif
/* Disable the UART by clearing the UARTEN bit in the UART CTL register */
ctl = getreg32(TIVA_CONSOLE_BASE + TIVA_UART_CTL_OFFSET);
ctl &= ~UART_CTL_UARTEN;
putreg32(ctl, TIVA_CONSOLE_BASE + TIVA_UART_CTL_OFFSET);
/* Write the integer portion of the BRD to the UART IBRD register */
putreg32(TIVA_BRDI, TIVA_CONSOLE_BASE + TIVA_UART_IBRD_OFFSET);
/* Write the fractional portion of the BRD to the UART FBRD register */
putreg32(TIVA_DIVFRAC, TIVA_CONSOLE_BASE + TIVA_UART_FBRD_OFFSET);
/* Write the desired serial parameters to the UART LCRH register */
putreg32(UART_LCRH_VALUE, TIVA_CONSOLE_BASE + TIVA_UART_LCRH_OFFSET);
/* Enable the UART by setting the UARTEN bit in the UART CTL register */
ctl |= (UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE);
putreg32(ctl, TIVA_CONSOLE_BASE + TIVA_UART_CTL_OFFSET);
#endif
}
void up_lowsetup(void)
{
uint32_t regval;
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
uint32_t ctl;
#endif
/* Enable the selected UARTs and configure GPIO pins needed by the
* the selected UARTs. NOTE: The serial driver later depends on
* this pin configuration -- whether or not a serial console is selected.
*/
#ifdef CONFIG_TIVA_UART0
regval = getreg32(TIVA_SYSCON_RCGC1);
regval |= SYSCON_RCGC1_UART0;
putreg32(regval, TIVA_SYSCON_RCGC1);
tiva_configgpio(GPIO_UART0_RX);
tiva_configgpio(GPIO_UART0_TX);
#endif
#ifdef CONFIG_TIVA_UART1
regval = getreg32(TIVA_SYSCON_RCGC1);
regval |= SYSCON_RCGC1_UART1;
putreg32(regval, TIVA_SYSCON_RCGC1);
tiva_configgpio(GPIO_UART1_RX);
tiva_configgpio(GPIO_UART1_TX);
#endif
#ifdef CONFIG_TIVA_UART2
regval = getreg32(TIVA_SYSCON_RCGC1);
regval |= SYSCON_RCGC1_UART2;
putreg32(regval, TIVA_SYSCON_RCGC1);
tiva_configgpio(GPIO_UART2_RX);
tiva_configgpio(GPIO_UART2_TX);
#endif
#ifdef CONFIG_TIVA_UART3
regval = getreg32(TIVA_SYSCON_RCGCUART);
regval |= SYSCON_RCGCUART_R3;
putreg32(regval, TIVA_SYSCON_RCGCUART);
tiva_configgpio(GPIO_UART3_RX);
tiva_configgpio(GPIO_UART3_TX);
#endif
#ifdef CONFIG_TIVA_UART4
regval = getreg32(TIVA_SYSCON_RCGCUART);
regval |= SYSCON_RCGCUART_R4;
putreg32(regval, TIVA_SYSCON_RCGCUART);
tiva_configgpio(GPIO_UART4_RX);
tiva_configgpio(GPIO_UART4_TX);
#endif
#ifdef CONFIG_TIVA_UART5
regval = getreg32(TIVA_SYSCON_RCGCUART);
regval |= SYSCON_RCGCUART_R5;
putreg32(regval, TIVA_SYSCON_RCGCUART);
tiva_configgpio(GPIO_UART5_RX);
tiva_configgpio(GPIO_UART5_TX);
#endif
#ifdef CONFIG_TIVA_UART6
regval = getreg32(TIVA_SYSCON_RCGCUART);
regval |= SYSCON_RCGCUART_R6;
putreg32(regval, TIVA_SYSCON_RCGCUART);
tiva_configgpio(GPIO_UART6_RX);
tiva_configgpio(GPIO_UART6_TX);
#endif
#ifdef CONFIG_TIVA_UART7
regval = getreg32(TIVA_SYSCON_RCGCUART);
regval |= SYSCON_RCGCUART_R7;
putreg32(regval, TIVA_SYSCON_RCGCUART);
tiva_configgpio(GPIO_UART7_RX);
tiva_configgpio(GPIO_UART7_TX);
#endif
/* Enable the selected console device */
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
/* Disable the UART by clearing the UARTEN bit in the UART CTL register */
ctl = getreg32(TIVA_CONSOLE_BASE+TIVA_UART_CTL_OFFSET);
ctl &= ~UART_CTL_UARTEN;
putreg32(ctl, TIVA_CONSOLE_BASE+TIVA_UART_CTL_OFFSET);
/* Write the integer portion of the BRD to the UART IBRD register */
putreg32(TIVA_BRDI, TIVA_CONSOLE_BASE+TIVA_UART_IBRD_OFFSET);
/* Write the fractional portion of the BRD to the UART FBRD register */
putreg32(TIVA_DIVFRAC, TIVA_CONSOLE_BASE+TIVA_UART_FBRD_OFFSET);
/* Write the desired serial parameters to the UART LCRH register */
putreg32(UART_LCRH_VALUE, TIVA_CONSOLE_BASE+TIVA_UART_LCRH_OFFSET);
/* Enable the UART by setting the UARTEN bit in the UART CTL register */
ctl |= (UART_CTL_UARTEN|UART_CTL_TXE|UART_CTL_RXE);
putreg32(ctl, TIVA_CONSOLE_BASE+TIVA_UART_CTL_OFFSET);
#endif
}
