static void rk30_tsadc_get(unsigned int chn, int *temp, int *code)
{
*temp = 0;
*code = 0;
if (!g_dev || chn > 1)
return;
mutex_lock(&tsadc_mutex);
clk_enable(g_dev->pclk);
clk_enable(g_dev->clk);
msleep(10);
tsadc_writel(0, TSADC_CTRL);
tsadc_writel(TSADC_CTRL_POWER_UP | TSADC_CTRL_CH(chn), TSADC_CTRL);
msleep(10);
if ((tsadc_readl(TSADC_STAS) & TSADC_STAS_BUSY_MASK) != TSADC_STAS_BUSY) {
int i;
*code = tsadc_readl(TSADC_DATA) & TSADC_DATA_MASK;
for (i = 0; i < ARRAY_SIZE(table) - 1; i++) {
if ((*code) <= table[i].code && (*code) > table[i + 1].code) {
*temp = table[i].temp + (table[i + 1].temp - table[i].temp) * (table[i].code - (*code)) / (table[i].code - table[i + 1].code);
}
}
}
tsadc_writel(0, TSADC_CTRL);
msleep(10);
clk_disable(g_dev->clk);
clk_disable(g_dev->pclk);
mutex_unlock(&tsadc_mutex);
}
static void rockchip_tsadc_set_auto_int_en( int chn, int ht_int_en,int tshut_en)
{
u32 ret;
tsadc_writel(0, TSADC_INT_EN);
if (ht_int_en){
ret = tsadc_readl(TSADC_INT_EN);
tsadc_writel( ret | (1 << chn), TSADC_INT_EN);
}
if (tshut_en){
ret = tsadc_readl(TSADC_INT_EN);
if (tsadc_ht_pull_gpio)
tsadc_writel(ret | (0xf << (chn + 4)), TSADC_INT_EN);
else if (tsadc_ht_reset_cru)
tsadc_writel(ret | (0xf << (chn + 8)), TSADC_INT_EN);
}
}
static void rockchip_tsadc_get(int chn, int *temp, int *code)
{
int i;
*temp = 0;
*code = 0;
if (!g_dev || chn > 4){
*temp = INVALID_TEMP;
return ;
}
#if 0
mutex_lock(&tsadc_mutex);
clk_enable(g_dev->pclk);
clk_enable(g_dev->clk);
msleep(10);
tsadc_writel(0, TSADC_USER_CON);
tsadc_writel(TSADC_CTRL_POWER_UP | TSADC_CTRL_CH(chn), TSADC_USER_CON);
msleep(20);
if ((tsadc_readl(TSADC_USER_CON) & TSADC_STAS_BUSY_MASK) != TSADC_STAS_BUSY) {
*code = tsadc_readl((TSADC_DATA0 + chn*4)) & TSADC_DATA_MASK;
for (i = 0; i < ARRAY_SIZE(table) - 1; i++) {
if ((*code) <= table[i].code && (*code) > table[i + 1].code) {
*temp = table[i].temp + (table[i + 1].temp - table[i].temp) * (table[i].code - (*code)) / (table[i].code - table[i + 1].code);
}
}
}
tsadc_writel(0, TSADC_USER_CON);
clk_disable(g_dev->clk);
clk_disable(g_dev->pclk);
mutex_unlock(&tsadc_mutex);
#else
*code = tsadc_readl((TSADC_DATA0 + chn*4)) & TSADC_DATA_MASK;
for (i = 0; i < ARRAY_SIZE(table) - 1; i++) {
if ((*code) <= table[i].code && (*code) > table[i + 1].code)
*temp = table[i].temp + (table[i + 1].temp
- table[i].temp) * (table[i].code - (*code))
/ (table[i].code - table[i + 1].code);
}
#endif
}
void rockchip_tsadc_auto_ht_work(struct work_struct *work)
{
int ret,val;
// printk("%s,line=%d\n", __func__,__LINE__);
mutex_lock(&tsadc_mutex);
val = tsadc_readl(TSADC_INT_PD);
tsadc_writel(val &(~ (1 <<8) ), TSADC_INT_PD);
ret = tsadc_readl(TSADC_INT_PD);
tsadc_writel(ret | 0xff, TSADC_INT_PD); //clr irq status
if ((val & 0x0f) != 0){
printk("rockchip tsadc is over temp . %s,line=%d\n", __func__,__LINE__);
pm_power_off(); //power_off
}
mutex_unlock(&tsadc_mutex);
}
static void rockchip_tsadc_auto_mode_set(int chn, int int_temp,
int shut_temp, int int_en, int shut_en)
{
u32 ret;
if (!g_dev || chn > 4)
return;
mutex_lock(&tsadc_mutex);
clk_enable(g_dev->pclk);
clk_enable(g_dev->clk);
msleep(10);
tsadc_writel(0, TSADC_AUTO_CON);
tsadc_writel(1 << (4+chn), TSADC_AUTO_CON);
msleep(10);
if ((tsadc_readl(TSADC_AUTO_CON) & TSADC_AUTO_STAS_BUSY_MASK) != TSADC_AUTO_STAS_BUSY) {
rockchip_tsadc_set_cmpn_int_vale(chn,int_temp);
rockchip_tsadc_set_cmpn_shut_vale(chn,shut_temp),
tsadc_writel(TSADC_AUTO_PERIOD_TIME, TSADC_AUTO_PERIOD);
tsadc_writel(TSADC_AUTO_PERIOD_HT_TIME, TSADC_AUTO_PERIOD_HT);
tsadc_writel(TSADC_HIGHT_INT_DEBOUNCE_TIME,
TSADC_HIGHT_INT_DEBOUNCE);
tsadc_writel(TSADC_HIGHT_TSHUT_DEBOUNCE_TIME,
TSADC_HIGHT_TSHUT_DEBOUNCE);
rockchip_tsadc_set_auto_int_en(chn,int_en,shut_en);
}
msleep(10);
ret = tsadc_readl(TSADC_AUTO_CON);
tsadc_writel(ret | (1 <<0) , TSADC_AUTO_CON);
mutex_unlock(&tsadc_mutex);
}