static inline void dpidle_post_handler(void) { // enable gpu dvfs timer mtk_enable_gpu_dvfs_timer(true); //restart thermal hrtimer for update temp info tscpu_start_thermal_timer(); // disable cpu dvfs timer // hp_enable_timer(1); // TODO: FIXME: disable first }
static inline void dpidle_post_handler(void) { #if 0//FIXME: K2 early porting // disable cpu dvfs timer hp_enable_timer(1); // enable gpu dvfs timer mtk_enable_gpu_dvfs_timer(true); #endif #ifndef CONFIG_MTK_FPGA //restart thermal hrtimer for update temp info tscpu_start_thermal_timer(); #endif }
static inline void dpidle_post_handler(void) { #if 0 // disable cpu dvfs timer hp_enable_timer(1); // enable gpu dvfs timer mtk_enable_gpu_dvfs_timer(true); #endif #ifndef CONFIG_MTK_FPGA #ifdef CONFIG_THERMAL //restart thermal hrtimer for update temp info tscpu_start_thermal_timer(); mtkts_bts_start_thermal_timer(); mtkts_btsmdpa_start_thermal_timer(); mtkts_pmic_start_thermal_timer(); mtkts_battery_start_thermal_timer(); mtkts_pa_start_thermal_timer(); mtkts_allts_start_thermal_timer(); #endif #endif }
static inline void soidle_post_handler(void) { //restart Mali dvfs_callback timer if (!mtk_gpu_sodi_exit()) { idle_ver("not restart GPU timer outside SODI\n"); } #ifndef CONFIG_MTK_FPGA #ifdef CONFIG_THERMAL //restart thermal hrtimer for update temp info tscpu_start_thermal_timer(); mtkts_bts_start_thermal_timer(); mtkts_btsmdpa_start_thermal_timer(); mtkts_pmic_start_thermal_timer(); mtkts_battery_start_thermal_timer(); mtkts_pa_start_thermal_timer(); mtkts_allts_start_thermal_timer(); mtkts_wmt_start_thermal_timer(); #endif #endif }